Lines Matching +defs:val +defs:level
286 u32 old, val; in bxt_dpio_phy_rmw_grp() local
319 int level = intel_ddi_level(encoder, crtc_state, lane); in bxt_dpio_phy_set_signal_levels() local
328 int level = intel_ddi_level(encoder, crtc_state, lane); in bxt_dpio_phy_set_signal_levels() local
329 u32 val; in bxt_dpio_phy_set_signal_levels() local
343 int level = intel_ddi_level(encoder, crtc_state, lane); in bxt_dpio_phy_set_signal_levels() local
385 u32 val = intel_de_read(display, BXT_PORT_REF_DW6(phy)); in bxt_get_grc() local
400 u32 val; in _bxt_dpio_phy_init() local
520 u32 val; in __phy_reg_verify_state() local
649 u32 val = intel_de_read(display, in bxt_dpio_phy_get_lane_lat_optim_mask() local
724 u32 val; in chv_set_phy_signal_level() local
819 u32 val; in chv_data_lane_soft_reset() local
868 u32 val; in chv_phy_pre_pll_enable() local
947 u32 val; in chv_phy_pre_encoder_enable() local
1033 u32 val; in chv_phy_post_pll_disable() local
1128 u32 val; in vlv_phy_pre_encoder_enable() local