Lines Matching full:i915

17 void valleyview_enable_display_irqs(struct drm_i915_private *i915);
18 void valleyview_disable_display_irqs(struct drm_i915_private *i915);
20 void ilk_update_display_irq(struct drm_i915_private *i915,
22 void ilk_enable_display_irq(struct drm_i915_private *i915, u32 bits);
23 void ilk_disable_display_irq(struct drm_i915_private *i915, u32 bits);
25 void bdw_update_port_irq(struct drm_i915_private *i915, u32 interrupt_mask, u32 enabled_irq_mask);
26 void bdw_enable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
27 void bdw_disable_pipe_irq(struct drm_i915_private *i915, enum pipe pipe, u32 bits);
29 void ibx_display_interrupt_update(struct drm_i915_private *i915,
31 void ibx_enable_display_interrupt(struct drm_i915_private *i915, u32 bits);
32 void ibx_disable_display_interrupt(struct drm_i915_private *i915, u32 bits);
34 void gen8_irq_power_well_post_enable(struct drm_i915_private *i915, u8 pipe_mask);
35 void gen8_irq_power_well_pre_disable(struct drm_i915_private *i915, u8 pipe_mask);
48 void ivb_display_irq_handler(struct drm_i915_private *i915, u32 de_iir);
49 void ilk_display_irq_handler(struct drm_i915_private *i915, u32 de_iir);
50 void gen8_de_irq_handler(struct drm_i915_private *i915, u32 master_ctl);
51 void gen11_display_irq_handler(struct drm_i915_private *i915);
53 u32 gen11_gu_misc_irq_ack(struct drm_i915_private *i915, const u32 master_ctl);
54 void gen11_gu_misc_irq_handler(struct drm_i915_private *i915, const u32 iir);
56 void i9xx_display_irq_reset(struct drm_i915_private *i915);
57 void vlv_display_irq_reset(struct drm_i915_private *i915);
58 void gen8_display_irq_reset(struct drm_i915_private *i915);
59 void gen11_display_irq_reset(struct drm_i915_private *i915);
61 void vlv_display_irq_postinstall(struct drm_i915_private *i915);
62 void ilk_de_irq_postinstall(struct drm_i915_private *i915);
63 void gen8_de_irq_postinstall(struct drm_i915_private *i915);
64 void gen11_de_irq_postinstall(struct drm_i915_private *i915);
65 void dg1_de_irq_postinstall(struct drm_i915_private *i915);
67 u32 i915_pipestat_enable_mask(struct drm_i915_private *i915, enum pipe pipe);
68 void i915_enable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
69 void i915_disable_pipestat(struct drm_i915_private *i915, enum pipe pipe, u32 status_mask);
70 void i915_enable_asle_pipestat(struct drm_i915_private *i915);
72 void i9xx_pipestat_irq_ack(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
74 void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
75 void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPE…
76 void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]);
78 void intel_display_irq_init(struct drm_i915_private *i915);
80 void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable);