Lines Matching full:24000

938 	cdclk_config->ref = 24000;  in skl_dpll0_update()
1312 	{ .refclk = 24000, .cdclk = 180000, .ratio = 15 },
1313 	{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },
1314 	{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },
1315 	{ .refclk = 24000, .cdclk = 324000, .ratio = 54 },
1316 	{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },
1317 	{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },
1336 	{ .refclk = 24000, .cdclk = 180000, .ratio =  30 },
1337 	{ .refclk = 24000, .cdclk = 192000, .ratio =  32 },
1338 	{ .refclk = 24000, .cdclk = 312000, .ratio =  52 },
1339 	{ .refclk = 24000, .cdclk = 324000, .ratio = 108 },
1340 	{ .refclk = 24000, .cdclk = 552000, .ratio =  92 },
1341 	{ .refclk = 24000, .cdclk = 648000, .ratio = 108 },
1357 	{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },
1358 	{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },
1374 	{ .refclk = 24000, .cdclk = 176000, .ratio = 22 },
1375 	{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },
1376 	{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },
1377 	{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },
1378 	{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },
1396 	{ .refclk = 24000, .cdclk = 176000, .ratio = 22 },
1397 	{ .refclk = 24000, .cdclk = 192000, .ratio = 16 },
1398 	{ .refclk = 24000, .cdclk = 312000, .ratio = 26 },
1399 	{ .refclk = 24000, .cdclk = 480000, .ratio = 40 },
1400 	{ .refclk = 24000, .cdclk = 552000, .ratio = 46 },
1401 	{ .refclk = 24000, .cdclk = 648000, .ratio = 54 },
1651 		cdclk_config->ref = 24000;  in icl_readout_refclk()
3385 		if (display->cdclk.hw.ref == 24000)  in intel_update_max_cdclk()
3390 		if (display->cdclk.hw.ref == 24000)  in intel_update_max_cdclk()
3496 		divider = 24000;  in cnp_rawclk()