19 				 dp->link.cap.lanes == 0x2 ? 0x3 : 0x1);  in hibmc_dp_link_training_configure()
21 				 dp->link.cap.lanes == 0x2 ? 0x1 : 0);  in hibmc_dp_link_training_configure()
27 	buf[0] = dp->link.cap.link_rate;  in hibmc_dp_link_training_configure()
28 	buf[1] = DP_LANE_COUNT_ENHANCED_FRAME_EN | dp->link.cap.lanes;  in hibmc_dp_link_training_configure()
110 	for (i = 0; i < dp->link.cap.lanes; i++)  in hibmc_dp_link_training_cr_pre()
113 	ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, train_set, dp->link.cap.lanes);  in hibmc_dp_link_training_cr_pre()
114 	if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_cr_pre()
128 	for (lane = 0; lane < dp->link.cap.lanes; lane++)  in hibmc_dp_link_get_adjust_train()
142 	switch (dp->link.cap.link_rate) {  in hibmc_dp_link_reduce_rate()
144 		dp->link.cap.link_rate = DP_LINK_BW_1_62;  in hibmc_dp_link_reduce_rate()
147 		dp->link.cap.link_rate = DP_LINK_BW_2_7;  in hibmc_dp_link_reduce_rate()
150 		dp->link.cap.link_rate = DP_LINK_BW_5_4;  in hibmc_dp_link_reduce_rate()
159 	switch (dp->link.cap.lanes) {  in hibmc_dp_link_reduce_lane()
161 		dp->link.cap.lanes--;  in hibmc_dp_link_reduce_lane()
196 		if (drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_cr()
210 					dp->link.cap.lanes);  in hibmc_dp_link_training_cr()
211 		if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_cr()
244 		if (!drm_dp_clock_recovery_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_channel_eq()
251 		if (drm_dp_channel_eq_ok(lane_status, dp->link.cap.lanes)) {  in hibmc_dp_link_training_channel_eq()
259 					dp->link.train_set, dp->link.cap.lanes);  in hibmc_dp_link_training_channel_eq()
260 		if (ret != dp->link.cap.lanes) {  in hibmc_dp_link_training_channel_eq()