Lines Matching +full:mmu +full:- +full:500 +full:s
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Etnaviv Project
9 #include <linux/dma-fence.h>
10 #include <linux/dma-mapping.h>
32 { .name = "etnaviv-gpu,2d" },
42 struct etnaviv_drm_private *priv = gpu->drm->dev_private; in etnaviv_gpu_get_param()
46 *value = gpu->identity.model; in etnaviv_gpu_get_param()
50 *value = gpu->identity.revision; in etnaviv_gpu_get_param()
54 *value = gpu->identity.features; in etnaviv_gpu_get_param()
58 *value = gpu->identity.minor_features0; in etnaviv_gpu_get_param()
62 *value = gpu->identity.minor_features1; in etnaviv_gpu_get_param()
66 *value = gpu->identity.minor_features2; in etnaviv_gpu_get_param()
70 *value = gpu->identity.minor_features3; in etnaviv_gpu_get_param()
74 *value = gpu->identity.minor_features4; in etnaviv_gpu_get_param()
78 *value = gpu->identity.minor_features5; in etnaviv_gpu_get_param()
82 *value = gpu->identity.minor_features6; in etnaviv_gpu_get_param()
86 *value = gpu->identity.minor_features7; in etnaviv_gpu_get_param()
90 *value = gpu->identity.minor_features8; in etnaviv_gpu_get_param()
94 *value = gpu->identity.minor_features9; in etnaviv_gpu_get_param()
98 *value = gpu->identity.minor_features10; in etnaviv_gpu_get_param()
102 *value = gpu->identity.minor_features11; in etnaviv_gpu_get_param()
106 *value = gpu->identity.stream_count; in etnaviv_gpu_get_param()
110 *value = gpu->identity.register_max; in etnaviv_gpu_get_param()
114 *value = gpu->identity.thread_count; in etnaviv_gpu_get_param()
118 *value = gpu->identity.vertex_cache_size; in etnaviv_gpu_get_param()
122 *value = gpu->identity.shader_core_count; in etnaviv_gpu_get_param()
126 *value = gpu->identity.pixel_pipes; in etnaviv_gpu_get_param()
130 *value = gpu->identity.vertex_output_buffer_size; in etnaviv_gpu_get_param()
134 *value = gpu->identity.buffer_size; in etnaviv_gpu_get_param()
138 *value = gpu->identity.instruction_count; in etnaviv_gpu_get_param()
142 *value = gpu->identity.num_constants; in etnaviv_gpu_get_param()
146 *value = gpu->identity.varyings_count; in etnaviv_gpu_get_param()
150 if (priv->mmu_global->version == ETNAVIV_IOMMU_V2) in etnaviv_gpu_get_param()
157 *value = gpu->identity.product_id; in etnaviv_gpu_get_param()
161 *value = gpu->identity.customer_id; in etnaviv_gpu_get_param()
165 *value = gpu->identity.eco_id; in etnaviv_gpu_get_param()
169 DBG("%s: invalid param: %u", dev_name(gpu->dev), param); in etnaviv_gpu_get_param()
170 return -EINVAL; in etnaviv_gpu_get_param()
186 ret = reset_control_deassert(gpu->rst); in etnaviv_gpu_reset_deassert()
201 return gpu->identity.model == model && in etnaviv_is_model_rev()
202 gpu->identity.revision == revision; in etnaviv_is_model_rev()
210 if (gpu->identity.minor_features0 & in etnaviv_hw_specs()
220 gpu->identity.stream_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
222 gpu->identity.register_max = etnaviv_field(specs[0], in etnaviv_hw_specs()
224 gpu->identity.thread_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
226 gpu->identity.vertex_cache_size = etnaviv_field(specs[0], in etnaviv_hw_specs()
228 gpu->identity.shader_core_count = etnaviv_field(specs[0], in etnaviv_hw_specs()
230 gpu->identity.pixel_pipes = etnaviv_field(specs[0], in etnaviv_hw_specs()
232 gpu->identity.vertex_output_buffer_size = in etnaviv_hw_specs()
236 gpu->identity.buffer_size = etnaviv_field(specs[1], in etnaviv_hw_specs()
238 gpu->identity.instruction_count = etnaviv_field(specs[1], in etnaviv_hw_specs()
240 gpu->identity.num_constants = etnaviv_field(specs[1], in etnaviv_hw_specs()
243 gpu->identity.varyings_count = etnaviv_field(specs[2], in etnaviv_hw_specs()
246 /* This overrides the value from older register if non-zero */ in etnaviv_hw_specs()
250 gpu->identity.stream_count = streams; in etnaviv_hw_specs()
254 if (gpu->identity.stream_count == 0) { in etnaviv_hw_specs()
255 if (gpu->identity.model >= 0x1000) in etnaviv_hw_specs()
256 gpu->identity.stream_count = 4; in etnaviv_hw_specs()
258 gpu->identity.stream_count = 1; in etnaviv_hw_specs()
262 if (gpu->identity.register_max) in etnaviv_hw_specs()
263 gpu->identity.register_max = 1 << gpu->identity.register_max; in etnaviv_hw_specs()
264 else if (gpu->identity.model == chipModel_GC400) in etnaviv_hw_specs()
265 gpu->identity.register_max = 32; in etnaviv_hw_specs()
267 gpu->identity.register_max = 64; in etnaviv_hw_specs()
270 if (gpu->identity.thread_count) in etnaviv_hw_specs()
271 gpu->identity.thread_count = 1 << gpu->identity.thread_count; in etnaviv_hw_specs()
272 else if (gpu->identity.model == chipModel_GC400) in etnaviv_hw_specs()
273 gpu->identity.thread_count = 64; in etnaviv_hw_specs()
274 else if (gpu->identity.model == chipModel_GC500 || in etnaviv_hw_specs()
275 gpu->identity.model == chipModel_GC530) in etnaviv_hw_specs()
276 gpu->identity.thread_count = 128; in etnaviv_hw_specs()
278 gpu->identity.thread_count = 256; in etnaviv_hw_specs()
280 if (gpu->identity.vertex_cache_size == 0) in etnaviv_hw_specs()
281 gpu->identity.vertex_cache_size = 8; in etnaviv_hw_specs()
283 if (gpu->identity.shader_core_count == 0) { in etnaviv_hw_specs()
284 if (gpu->identity.model >= 0x1000) in etnaviv_hw_specs()
285 gpu->identity.shader_core_count = 2; in etnaviv_hw_specs()
287 gpu->identity.shader_core_count = 1; in etnaviv_hw_specs()
290 if (gpu->identity.pixel_pipes == 0) in etnaviv_hw_specs()
291 gpu->identity.pixel_pipes = 1; in etnaviv_hw_specs()
294 if (gpu->identity.vertex_output_buffer_size) { in etnaviv_hw_specs()
295 gpu->identity.vertex_output_buffer_size = in etnaviv_hw_specs()
296 1 << gpu->identity.vertex_output_buffer_size; in etnaviv_hw_specs()
297 } else if (gpu->identity.model == chipModel_GC400) { in etnaviv_hw_specs()
298 if (gpu->identity.revision < 0x4000) in etnaviv_hw_specs()
299 gpu->identity.vertex_output_buffer_size = 512; in etnaviv_hw_specs()
300 else if (gpu->identity.revision < 0x4200) in etnaviv_hw_specs()
301 gpu->identity.vertex_output_buffer_size = 256; in etnaviv_hw_specs()
303 gpu->identity.vertex_output_buffer_size = 128; in etnaviv_hw_specs()
305 gpu->identity.vertex_output_buffer_size = 512; in etnaviv_hw_specs()
308 switch (gpu->identity.instruction_count) { in etnaviv_hw_specs()
311 gpu->identity.model == chipModel_GC880) in etnaviv_hw_specs()
312 gpu->identity.instruction_count = 512; in etnaviv_hw_specs()
314 gpu->identity.instruction_count = 256; in etnaviv_hw_specs()
318 gpu->identity.instruction_count = 1024; in etnaviv_hw_specs()
322 gpu->identity.instruction_count = 2048; in etnaviv_hw_specs()
326 gpu->identity.instruction_count = 256; in etnaviv_hw_specs()
330 if (gpu->identity.num_constants == 0) in etnaviv_hw_specs()
331 gpu->identity.num_constants = 168; in etnaviv_hw_specs()
333 if (gpu->identity.varyings_count == 0) { in etnaviv_hw_specs()
334 if (gpu->identity.minor_features1 & chipMinorFeatures1_HALTI0) in etnaviv_hw_specs()
335 gpu->identity.varyings_count = 12; in etnaviv_hw_specs()
337 gpu->identity.varyings_count = 8; in etnaviv_hw_specs()
355 gpu->identity.varyings_count -= 1; in etnaviv_hw_specs()
366 gpu->identity.model = chipModel_GC500; in etnaviv_hw_identify()
367 gpu->identity.revision = etnaviv_field(chipIdentity, in etnaviv_hw_identify()
372 gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL); in etnaviv_hw_identify()
373 gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV); in etnaviv_hw_identify()
374 gpu->identity.customer_id = gpu_read(gpu, VIVS_HI_CHIP_CUSTOMER_ID); in etnaviv_hw_identify()
378 * unhandled fault: external abort on non-linefetch in etnaviv_hw_identify()
381 gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID); in etnaviv_hw_identify()
382 gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID); in etnaviv_hw_identify()
388 * know about it - here is the hack to make it all look the in etnaviv_hw_identify()
391 if ((gpu->identity.model & 0xff00) == 0x0400 && in etnaviv_hw_identify()
392 gpu->identity.model != chipModel_GC420) { in etnaviv_hw_identify()
393 gpu->identity.model = gpu->identity.model & 0x0400; in etnaviv_hw_identify()
405 gpu->identity.revision = 0x1051; in etnaviv_hw_identify()
411 * reality it's just a re-branded GC3000. We can identify this in etnaviv_hw_identify()
417 gpu->identity.model = chipModel_GC3000; in etnaviv_hw_identify()
418 gpu->identity.revision &= 0xffff; in etnaviv_hw_identify()
422 gpu->identity.eco_id = 1; in etnaviv_hw_identify()
425 gpu->identity.eco_id = 1; in etnaviv_hw_identify()
428 dev_info(gpu->dev, "model: GC%x, revision: %x\n", in etnaviv_hw_identify()
429 gpu->identity.model, gpu->identity.revision); in etnaviv_hw_identify()
431 gpu->idle_mask = ~VIVS_HI_IDLE_STATE_AXI_LP; in etnaviv_hw_identify()
439 gpu->identity.features = gpu_read(gpu, VIVS_HI_CHIP_FEATURE); in etnaviv_hw_identify()
442 if (gpu->identity.model == chipModel_GC700) in etnaviv_hw_identify()
443 gpu->identity.features &= ~chipFeatures_FAST_CLEAR; in etnaviv_hw_identify()
446 if ((gpu->identity.model == chipModel_GC500 && in etnaviv_hw_identify()
447 gpu->identity.revision <= 2) || in etnaviv_hw_identify()
448 gpu->identity.model == chipModel_GC300) in etnaviv_hw_identify()
449 gpu->identity.features |= chipFeatures_PIPE_2D; in etnaviv_hw_identify()
451 if ((gpu->identity.model == chipModel_GC500 && in etnaviv_hw_identify()
452 gpu->identity.revision < 2) || in etnaviv_hw_identify()
453 (gpu->identity.model == chipModel_GC300 && in etnaviv_hw_identify()
454 gpu->identity.revision < 0x2000)) { in etnaviv_hw_identify()
460 gpu->identity.minor_features0 = 0; in etnaviv_hw_identify()
461 gpu->identity.minor_features1 = 0; in etnaviv_hw_identify()
462 gpu->identity.minor_features2 = 0; in etnaviv_hw_identify()
463 gpu->identity.minor_features3 = 0; in etnaviv_hw_identify()
464 gpu->identity.minor_features4 = 0; in etnaviv_hw_identify()
465 gpu->identity.minor_features5 = 0; in etnaviv_hw_identify()
467 gpu->identity.minor_features0 = in etnaviv_hw_identify()
470 if (gpu->identity.minor_features0 & in etnaviv_hw_identify()
472 gpu->identity.minor_features1 = in etnaviv_hw_identify()
474 gpu->identity.minor_features2 = in etnaviv_hw_identify()
476 gpu->identity.minor_features3 = in etnaviv_hw_identify()
478 gpu->identity.minor_features4 = in etnaviv_hw_identify()
480 gpu->identity.minor_features5 = in etnaviv_hw_identify()
485 if (gpu->identity.model == chipModel_GC600 || in etnaviv_hw_identify()
486 gpu->identity.model == chipModel_GC300) in etnaviv_hw_identify()
487 gpu->idle_mask = VIVS_HI_IDLE_STATE_TX | in etnaviv_hw_identify()
508 if (gpu->identity.minor_features2 & in etnaviv_gpu_update_clock()
510 clk_set_rate(gpu->clk_core, in etnaviv_gpu_update_clock()
511 gpu->base_rate_core >> gpu->freq_scale); in etnaviv_gpu_update_clock()
512 clk_set_rate(gpu->clk_shader, in etnaviv_gpu_update_clock()
513 gpu->base_rate_shader >> gpu->freq_scale); in etnaviv_gpu_update_clock()
515 unsigned int fscale = 1 << (6 - gpu->freq_scale); in etnaviv_gpu_update_clock()
528 gpu->fe_waitcycles = clamp(gpu->base_rate_core >> (15 - gpu->freq_scale), in etnaviv_gpu_update_clock()
542 unsigned int fscale = 1 << (6 - gpu->freq_scale); in etnaviv_hw_reset()
562 if (gpu->sec_mode == ETNA_SEC_KERNEL) { in etnaviv_hw_reset()
587 dev_dbg(gpu->dev, "FE is not idle\n"); in etnaviv_hw_reset()
597 dev_dbg(gpu->dev, "GPU is not idle\n"); in etnaviv_hw_reset()
613 dev_err(gpu->dev, "GPU failed to reset: FE %sidle, 3D %sidle, 2D %sidle\n", in etnaviv_hw_reset()
618 return -EBUSY; in etnaviv_hw_reset()
624 gpu->state = ETNA_GPU_STATE_RESET; in etnaviv_hw_reset()
625 gpu->exec_state = -1; in etnaviv_hw_reset()
626 if (gpu->mmu_context) in etnaviv_hw_reset()
627 etnaviv_iommu_context_put(gpu->mmu_context); in etnaviv_hw_reset()
628 gpu->mmu_context = NULL; in etnaviv_hw_reset()
642 if (gpu->identity.revision == 0x4301 || in etnaviv_gpu_enable_mlcg()
643 gpu->identity.revision == 0x4302) in etnaviv_gpu_enable_mlcg()
651 if (gpu->identity.model >= chipModel_GC400 && in etnaviv_gpu_enable_mlcg()
652 gpu->identity.model != chipModel_GC420 && in etnaviv_gpu_enable_mlcg()
653 !(gpu->identity.minor_features3 & chipMinorFeatures3_BUG_FIXES12)) in etnaviv_gpu_enable_mlcg()
660 if (gpu->identity.revision < 0x5000 && in etnaviv_gpu_enable_mlcg()
661 gpu->identity.minor_features0 & chipMinorFeatures0_HZ && in etnaviv_gpu_enable_mlcg()
662 !(gpu->identity.minor_features1 & in etnaviv_gpu_enable_mlcg()
666 if (gpu->identity.revision < 0x5422) in etnaviv_gpu_enable_mlcg()
700 if (gpu->sec_mode == ETNA_SEC_KERNEL) { in etnaviv_gpu_start_fe()
713 WARN_ON(gpu->state != ETNA_GPU_STATE_INITIALIZED); in etnaviv_gpu_start_fe_idleloop()
715 /* setup the MMU */ in etnaviv_gpu_start_fe_idleloop()
720 address = etnaviv_cmdbuf_get_va(&gpu->buffer, in etnaviv_gpu_start_fe_idleloop()
721 &gpu->mmu_context->cmdbuf_mapping); in etnaviv_gpu_start_fe_idleloop()
725 gpu->state = ETNA_GPU_STATE_RUNNING; in etnaviv_gpu_start_fe_idleloop()
748 if ((gpu->identity.revision > 0x5420) && in etnaviv_gpu_setup_pulse_eater()
749 (gpu->identity.features & chipFeatures_PIPE_3D)) in etnaviv_gpu_setup_pulse_eater()
761 WARN_ON(!(gpu->state == ETNA_GPU_STATE_IDENTIFIED || in etnaviv_gpu_hw_init()
762 gpu->state == ETNA_GPU_STATE_RESET)); in etnaviv_gpu_hw_init()
771 if (gpu->identity.revision == 0x5007) in etnaviv_gpu_hw_init()
779 /* enable module-level clock gating */ in etnaviv_gpu_hw_init()
800 if (gpu->sec_mode == ETNA_SEC_KERNEL) { in etnaviv_gpu_hw_init()
811 gpu->state = ETNA_GPU_STATE_INITIALIZED; in etnaviv_gpu_hw_init()
816 struct etnaviv_drm_private *priv = gpu->drm->dev_private; in etnaviv_gpu_init()
820 ret = pm_runtime_get_sync(gpu->dev); in etnaviv_gpu_init()
822 dev_err(gpu->dev, "Failed to enable GPU power domain\n"); in etnaviv_gpu_init()
828 dev_err(gpu->dev, "GPU reset deassert failed\n"); in etnaviv_gpu_init()
834 if (gpu->identity.model == 0) { in etnaviv_gpu_init()
835 dev_err(gpu->dev, "Unknown GPU model\n"); in etnaviv_gpu_init()
836 ret = -ENXIO; in etnaviv_gpu_init()
840 if (gpu->identity.nn_core_count > 0) in etnaviv_gpu_init()
841 dev_warn(gpu->dev, "etnaviv has been instantiated on a NPU, " in etnaviv_gpu_init()
845 if (gpu->identity.features & chipFeatures_PIPE_VG && in etnaviv_gpu_init()
846 gpu->identity.features & chipFeatures_FE20) { in etnaviv_gpu_init()
847 dev_info(gpu->dev, "Ignoring GPU with VG and FE2.0\n"); in etnaviv_gpu_init()
848 ret = -ENXIO; in etnaviv_gpu_init()
856 if ((gpu->identity.minor_features7 & chipMinorFeatures7_BIT_SECURITY) && in etnaviv_gpu_init()
857 (gpu->identity.minor_features10 & chipMinorFeatures10_SECURITY_AHB)) in etnaviv_gpu_init()
858 gpu->sec_mode = ETNA_SEC_KERNEL; in etnaviv_gpu_init()
860 gpu->state = ETNA_GPU_STATE_IDENTIFIED; in etnaviv_gpu_init()
864 dev_err(gpu->dev, "GPU reset failed\n"); in etnaviv_gpu_init()
873 ret = etnaviv_cmdbuf_init(priv->cmdbuf_suballoc, &gpu->buffer, SZ_4K); in etnaviv_gpu_init()
875 dev_err(gpu->dev, "could not create command buffer\n"); in etnaviv_gpu_init()
882 * chosen arbitrarily but helps in debugging, as the MMU offset in etnaviv_gpu_init()
888 * expose this issue, as all TS accesses are MMU translated, so the in etnaviv_gpu_init()
891 cmdbuf_paddr = ALIGN_DOWN(etnaviv_cmdbuf_get_pa(&gpu->buffer), SZ_128M); in etnaviv_gpu_init()
893 if (!(gpu->identity.features & chipFeatures_PIPE_3D) || in etnaviv_gpu_init()
894 (gpu->identity.minor_features0 & chipMinorFeatures0_MC20) || in etnaviv_gpu_init()
895 (gpu->identity.minor_features1 & chipMinorFeatures1_MMU_VERSION)) { in etnaviv_gpu_init()
897 priv->mmu_global->memory_base = SZ_2G; in etnaviv_gpu_init()
899 priv->mmu_global->memory_base = cmdbuf_paddr; in etnaviv_gpu_init()
901 dev_info(gpu->dev, in etnaviv_gpu_init()
903 gpu->identity.features &= ~chipFeatures_FAST_CLEAR; in etnaviv_gpu_init()
904 priv->mmu_global->memory_base = SZ_2G; in etnaviv_gpu_init()
908 spin_lock_init(&gpu->event_spinlock); in etnaviv_gpu_init()
909 init_completion(&gpu->event_free); in etnaviv_gpu_init()
910 bitmap_zero(gpu->event_bitmap, ETNA_NR_EVENTS); in etnaviv_gpu_init()
911 for (i = 0; i < ARRAY_SIZE(gpu->event); i++) in etnaviv_gpu_init()
912 complete(&gpu->event_free); in etnaviv_gpu_init()
915 mutex_lock(&gpu->lock); in etnaviv_gpu_init()
917 mutex_unlock(&gpu->lock); in etnaviv_gpu_init()
919 pm_runtime_mark_last_busy(gpu->dev); in etnaviv_gpu_init()
920 pm_runtime_put_autosuspend(gpu->dev); in etnaviv_gpu_init()
925 pm_runtime_mark_last_busy(gpu->dev); in etnaviv_gpu_init()
927 pm_runtime_put_autosuspend(gpu->dev); in etnaviv_gpu_init()
942 debug->address[0] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); in verify_dma()
943 debug->state[0] = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE); in verify_dma()
945 for (i = 0; i < 500; i++) { in verify_dma()
946 debug->address[1] = gpu_read(gpu, VIVS_FE_DMA_ADDRESS); in verify_dma()
947 debug->state[1] = gpu_read(gpu, VIVS_FE_DMA_DEBUG_STATE); in verify_dma()
949 if (debug->address[0] != debug->address[1]) in verify_dma()
952 if (debug->state[0] != debug->state[1]) in verify_dma()
963 seq_printf(m, "%s Status:\n", dev_name(gpu->dev)); in etnaviv_gpu_debugfs()
965 ret = pm_runtime_get_sync(gpu->dev); in etnaviv_gpu_debugfs()
977 seq_printf(m, "\t model: 0x%x\n", gpu->identity.model); in etnaviv_gpu_debugfs()
978 seq_printf(m, "\t revision: 0x%x\n", gpu->identity.revision); in etnaviv_gpu_debugfs()
979 seq_printf(m, "\t product_id: 0x%x\n", gpu->identity.product_id); in etnaviv_gpu_debugfs()
980 seq_printf(m, "\t customer_id: 0x%x\n", gpu->identity.customer_id); in etnaviv_gpu_debugfs()
981 seq_printf(m, "\t eco_id: 0x%x\n", gpu->identity.eco_id); in etnaviv_gpu_debugfs()
985 gpu->identity.features); in etnaviv_gpu_debugfs()
987 gpu->identity.minor_features0); in etnaviv_gpu_debugfs()
989 gpu->identity.minor_features1); in etnaviv_gpu_debugfs()
991 gpu->identity.minor_features2); in etnaviv_gpu_debugfs()
993 gpu->identity.minor_features3); in etnaviv_gpu_debugfs()
995 gpu->identity.minor_features4); in etnaviv_gpu_debugfs()
997 gpu->identity.minor_features5); in etnaviv_gpu_debugfs()
999 gpu->identity.minor_features6); in etnaviv_gpu_debugfs()
1001 gpu->identity.minor_features7); in etnaviv_gpu_debugfs()
1003 gpu->identity.minor_features8); in etnaviv_gpu_debugfs()
1005 gpu->identity.minor_features9); in etnaviv_gpu_debugfs()
1007 gpu->identity.minor_features10); in etnaviv_gpu_debugfs()
1009 gpu->identity.minor_features11); in etnaviv_gpu_debugfs()
1013 gpu->identity.stream_count); in etnaviv_gpu_debugfs()
1015 gpu->identity.register_max); in etnaviv_gpu_debugfs()
1017 gpu->identity.thread_count); in etnaviv_gpu_debugfs()
1019 gpu->identity.vertex_cache_size); in etnaviv_gpu_debugfs()
1021 gpu->identity.shader_core_count); in etnaviv_gpu_debugfs()
1023 gpu->identity.nn_core_count); in etnaviv_gpu_debugfs()
1025 gpu->identity.pixel_pipes); in etnaviv_gpu_debugfs()
1027 gpu->identity.vertex_output_buffer_size); in etnaviv_gpu_debugfs()
1029 gpu->identity.buffer_size); in etnaviv_gpu_debugfs()
1031 gpu->identity.instruction_count); in etnaviv_gpu_debugfs()
1033 gpu->identity.num_constants); in etnaviv_gpu_debugfs()
1035 gpu->identity.varyings_count); in etnaviv_gpu_debugfs()
1039 idle |= ~gpu->idle_mask & ~VIVS_HI_IDLE_STATE_AXI_LP; in etnaviv_gpu_debugfs()
1081 if (gpu->identity.features & chipFeatures_DEBUG_MODE) { in etnaviv_gpu_debugfs()
1112 pm_runtime_mark_last_busy(gpu->dev); in etnaviv_gpu_debugfs()
1114 pm_runtime_put_autosuspend(gpu->dev); in etnaviv_gpu_debugfs()
1140 return dev_name(f->gpu->dev); in etnaviv_fence_get_timeline_name()
1147 return (s32)(f->gpu->completed_fence - f->base.seqno) >= 0; in etnaviv_fence_signaled()
1172 lockdep_assert_held(&gpu->lock); in etnaviv_gpu_fence_alloc()
1178 f->gpu = gpu; in etnaviv_gpu_fence_alloc()
1180 dma_fence_init(&f->base, &etnaviv_fence_ops, &gpu->fence_spinlock, in etnaviv_gpu_fence_alloc()
1181 gpu->fence_context, ++gpu->next_fence); in etnaviv_gpu_fence_alloc()
1183 return &f->base; in etnaviv_gpu_fence_alloc()
1189 return (s32)(a - b) > 0; in fence_after()
1206 remaining = wait_for_completion_timeout(&gpu->event_free, timeout); in event_alloc()
1209 dev_err(gpu->dev, "wait_for_completion_timeout failed"); in event_alloc()
1210 ret = -EBUSY; in event_alloc()
1218 spin_lock(&gpu->event_spinlock); in event_alloc()
1221 int event = find_first_zero_bit(gpu->event_bitmap, ETNA_NR_EVENTS); in event_alloc()
1224 memset(&gpu->event[event], 0, sizeof(struct etnaviv_event)); in event_alloc()
1225 set_bit(event, gpu->event_bitmap); in event_alloc()
1228 spin_unlock(&gpu->event_spinlock); in event_alloc()
1231 ret = pm_runtime_resume_and_get(gpu->dev); in event_alloc()
1241 pm_runtime_put_autosuspend(gpu->dev); in event_alloc()
1244 complete(&gpu->event_free); in event_alloc()
1251 if (!test_bit(event, gpu->event_bitmap)) { in event_free()
1252 dev_warn(gpu->dev, "event %u is already marked as free", in event_free()
1255 clear_bit(event, gpu->event_bitmap); in event_free()
1256 complete(&gpu->event_free); in event_free()
1259 pm_runtime_put_autosuspend(gpu->dev); in event_free()
1277 fence = xa_load(&gpu->user_fences, id); in etnaviv_gpu_wait_fence_interruptible()
1287 ret = dma_fence_is_signaled(fence) ? 0 : -EBUSY; in etnaviv_gpu_wait_fence_interruptible()
1293 ret = -ETIMEDOUT; in etnaviv_gpu_wait_fence_interruptible()
1294 else if (ret != -ERESTARTSYS) in etnaviv_gpu_wait_fence_interruptible()
1304 * Wait for an object to become inactive. This, on it's own, is not race
1306 * then the iova is put. Moreover, the object could be re-submitted just
1307 * after we notice that it's become inactive.
1320 return !is_active(etnaviv_obj) ? 0 : -EBUSY; in etnaviv_gpu_wait_obj_inactive()
1324 ret = wait_event_interruptible_timeout(gpu->fence_event, in etnaviv_gpu_wait_obj_inactive()
1329 else if (ret == -ERESTARTSYS) in etnaviv_gpu_wait_obj_inactive()
1330 return -ERESTARTSYS; in etnaviv_gpu_wait_obj_inactive()
1332 return -ETIMEDOUT; in etnaviv_gpu_wait_obj_inactive()
1338 const struct etnaviv_gem_submit *submit = event->submit; in sync_point_perfmon_sample()
1341 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample()
1342 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; in sync_point_perfmon_sample()
1344 if (pmr->flags == flags) in sync_point_perfmon_sample()
1345 etnaviv_perfmon_process(gpu, pmr, submit->exec_state); in sync_point_perfmon_sample()
1354 mutex_lock(&gpu->lock); in sync_point_perfmon_sample_pre()
1363 mutex_unlock(&gpu->lock); in sync_point_perfmon_sample_pre()
1369 const struct etnaviv_gem_submit *submit = event->submit; in sync_point_perfmon_sample_post()
1373 mutex_lock(&gpu->lock); in sync_point_perfmon_sample_post()
1382 mutex_unlock(&gpu->lock); in sync_point_perfmon_sample_post()
1384 for (i = 0; i < submit->nr_pmrs; i++) { in sync_point_perfmon_sample_post()
1385 const struct etnaviv_perfmon_request *pmr = submit->pmrs + i; in sync_point_perfmon_sample_post()
1387 *pmr->bo_vma = pmr->sequence; in sync_point_perfmon_sample_post()
1392 /* add bo's to gpu's ring, and kick gpu: */
1395 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_gpu_submit()
1402 * - a sync point to re-configure gpu and process ETNA_PM_PROCESS_PRE in etnaviv_gpu_submit()
1404 * - a sync point to re-configure gpu, process ETNA_PM_PROCESS_POST requests in etnaviv_gpu_submit()
1407 if (submit->nr_pmrs) in etnaviv_gpu_submit()
1413 pm_runtime_put_noidle(gpu->dev); in etnaviv_gpu_submit()
1417 mutex_lock(&gpu->lock); in etnaviv_gpu_submit()
1427 if (gpu->state == ETNA_GPU_STATE_INITIALIZED) in etnaviv_gpu_submit()
1428 etnaviv_gpu_start_fe_idleloop(gpu, submit->mmu_context); in etnaviv_gpu_submit()
1430 if (submit->prev_mmu_context) in etnaviv_gpu_submit()
1431 etnaviv_iommu_context_put(submit->prev_mmu_context); in etnaviv_gpu_submit()
1432 submit->prev_mmu_context = etnaviv_iommu_context_get(gpu->mmu_context); in etnaviv_gpu_submit()
1434 if (submit->nr_pmrs) { in etnaviv_gpu_submit()
1435 gpu->event[event[1]].sync_point = &sync_point_perfmon_sample_pre; in etnaviv_gpu_submit()
1436 kref_get(&submit->refcount); in etnaviv_gpu_submit()
1437 gpu->event[event[1]].submit = submit; in etnaviv_gpu_submit()
1441 gpu->event[event[0]].fence = gpu_fence; in etnaviv_gpu_submit()
1442 submit->cmdbuf.user_size = submit->cmdbuf.size - 8; in etnaviv_gpu_submit()
1443 etnaviv_buffer_queue(gpu, submit->exec_state, submit->mmu_context, in etnaviv_gpu_submit()
1444 event[0], &submit->cmdbuf); in etnaviv_gpu_submit()
1446 if (submit->nr_pmrs) { in etnaviv_gpu_submit()
1447 gpu->event[event[2]].sync_point = &sync_point_perfmon_sample_post; in etnaviv_gpu_submit()
1448 kref_get(&submit->refcount); in etnaviv_gpu_submit()
1449 gpu->event[event[2]].submit = submit; in etnaviv_gpu_submit()
1454 mutex_unlock(&gpu->lock); in etnaviv_gpu_submit()
1463 struct etnaviv_event *event = &gpu->event[gpu->sync_point_event]; in sync_point_worker()
1466 event->sync_point(gpu, event); in sync_point_worker()
1467 etnaviv_submit_put(event->submit); in sync_point_worker()
1468 event_free(gpu, gpu->sync_point_event); in sync_point_worker()
1476 struct etnaviv_gpu *gpu = submit->gpu; in etnaviv_gpu_recover_hang()
1481 dev_err(gpu->dev, "recover hung GPU!\n"); in etnaviv_gpu_recover_hang()
1483 task = get_pid_task(submit->pid, PIDTYPE_PID); in etnaviv_gpu_recover_hang()
1485 comm = kstrdup(task->comm, GFP_KERNEL); in etnaviv_gpu_recover_hang()
1491 dev_err(gpu->dev, "offending task: %s (%s)\n", comm, cmd); in etnaviv_gpu_recover_hang()
1496 if (pm_runtime_get_sync(gpu->dev) < 0) in etnaviv_gpu_recover_hang()
1499 mutex_lock(&gpu->lock); in etnaviv_gpu_recover_hang()
1504 spin_lock(&gpu->event_spinlock); in etnaviv_gpu_recover_hang()
1505 for_each_set_bit(i, gpu->event_bitmap, ETNA_NR_EVENTS) in etnaviv_gpu_recover_hang()
1507 spin_unlock(&gpu->event_spinlock); in etnaviv_gpu_recover_hang()
1511 mutex_unlock(&gpu->lock); in etnaviv_gpu_recover_hang()
1512 pm_runtime_mark_last_busy(gpu->dev); in etnaviv_gpu_recover_hang()
1514 pm_runtime_put_autosuspend(gpu->dev); in etnaviv_gpu_recover_hang()
1531 if (gpu->sec_mode == ETNA_SEC_NONE) in dump_mmu_fault()
1537 dev_err_ratelimited(gpu->dev, "MMU fault status 0x%08x\n", status); in dump_mmu_fault()
1548 if ((mmu_status - 1) < ARRAY_SIZE(fault_reasons)) in dump_mmu_fault()
1549 reason = fault_reasons[mmu_status - 1]; in dump_mmu_fault()
1551 if (gpu->sec_mode == ETNA_SEC_NONE) in dump_mmu_fault()
1556 dev_err_ratelimited(gpu->dev, in dump_mmu_fault()
1557 "MMU %d fault (%s) addr 0x%08x\n", in dump_mmu_fault()
1573 pm_runtime_mark_last_busy(gpu->dev); in irq_handler()
1575 dev_dbg(gpu->dev, "intr 0x%08x\n", intr); in irq_handler()
1578 dev_err(gpu->dev, "AXI bus error\n"); in irq_handler()
1584 gpu->state = ETNA_GPU_STATE_FAULT; in irq_handler()
1585 drm_sched_fault(&gpu->sched); in irq_handler()
1592 event -= 1; in irq_handler()
1596 dev_dbg(gpu->dev, "event %u\n", event); in irq_handler()
1598 if (gpu->event[event].sync_point) { in irq_handler()
1599 gpu->sync_point_event = event; in irq_handler()
1600 queue_work(gpu->wq, &gpu->sync_point_work); in irq_handler()
1603 fence = gpu->event[event].fence; in irq_handler()
1607 gpu->event[event].fence = NULL; in irq_handler()
1611 * - allocate and queue event 0 in irq_handler()
1612 * - allocate event 1 in irq_handler()
1613 * - event 0 completes, we process it in irq_handler()
1614 * - allocate and queue event 0 in irq_handler()
1615 * - event 1 and event 0 complete in irq_handler()
1618 if (fence_after(fence->seqno, gpu->completed_fence)) in irq_handler()
1619 gpu->completed_fence = fence->seqno; in irq_handler()
1635 ret = clk_prepare_enable(gpu->clk_reg); in etnaviv_gpu_clk_enable()
1639 ret = clk_prepare_enable(gpu->clk_bus); in etnaviv_gpu_clk_enable()
1643 ret = clk_prepare_enable(gpu->clk_core); in etnaviv_gpu_clk_enable()
1647 ret = clk_prepare_enable(gpu->clk_shader); in etnaviv_gpu_clk_enable()
1654 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_enable()
1656 clk_disable_unprepare(gpu->clk_bus); in etnaviv_gpu_clk_enable()
1658 clk_disable_unprepare(gpu->clk_reg); in etnaviv_gpu_clk_enable()
1665 clk_disable_unprepare(gpu->clk_shader); in etnaviv_gpu_clk_disable()
1666 clk_disable_unprepare(gpu->clk_core); in etnaviv_gpu_clk_disable()
1667 clk_disable_unprepare(gpu->clk_bus); in etnaviv_gpu_clk_disable()
1668 clk_disable_unprepare(gpu->clk_reg); in etnaviv_gpu_clk_disable()
1680 if ((idle & gpu->idle_mask) == gpu->idle_mask) in etnaviv_gpu_wait_idle()
1684 dev_warn(gpu->dev, in etnaviv_gpu_wait_idle()
1687 return -ETIMEDOUT; in etnaviv_gpu_wait_idle()
1696 if (gpu->state == ETNA_GPU_STATE_RUNNING) { in etnaviv_gpu_hw_suspend()
1698 mutex_lock(&gpu->lock); in etnaviv_gpu_hw_suspend()
1700 mutex_unlock(&gpu->lock); in etnaviv_gpu_hw_suspend()
1709 gpu->state = ETNA_GPU_STATE_INITIALIZED; in etnaviv_gpu_hw_suspend()
1712 gpu->exec_state = -1; in etnaviv_gpu_hw_suspend()
1719 ret = mutex_lock_killable(&gpu->lock); in etnaviv_gpu_hw_resume()
1726 mutex_unlock(&gpu->lock); in etnaviv_gpu_hw_resume()
1744 struct etnaviv_gpu *gpu = cdev->devdata; in etnaviv_gpu_cooling_get_cur_state()
1746 *state = gpu->freq_scale; in etnaviv_gpu_cooling_get_cur_state()
1755 struct etnaviv_gpu *gpu = cdev->devdata; in etnaviv_gpu_cooling_set_cur_state()
1757 mutex_lock(&gpu->lock); in etnaviv_gpu_cooling_set_cur_state()
1758 gpu->freq_scale = state; in etnaviv_gpu_cooling_set_cur_state()
1759 if (!pm_runtime_suspended(gpu->dev)) in etnaviv_gpu_cooling_set_cur_state()
1761 mutex_unlock(&gpu->lock); in etnaviv_gpu_cooling_set_cur_state()
1776 struct etnaviv_drm_private *priv = drm->dev_private; in etnaviv_gpu_bind()
1781 gpu->cooling = thermal_of_cooling_device_register(dev->of_node, in etnaviv_gpu_bind()
1783 if (IS_ERR(gpu->cooling)) in etnaviv_gpu_bind()
1784 return PTR_ERR(gpu->cooling); in etnaviv_gpu_bind()
1787 gpu->wq = alloc_ordered_workqueue(dev_name(dev), 0); in etnaviv_gpu_bind()
1788 if (!gpu->wq) { in etnaviv_gpu_bind()
1789 ret = -ENOMEM; in etnaviv_gpu_bind()
1803 gpu->drm = drm; in etnaviv_gpu_bind()
1804 gpu->fence_context = dma_fence_context_alloc(1); in etnaviv_gpu_bind()
1805 xa_init_flags(&gpu->user_fences, XA_FLAGS_ALLOC); in etnaviv_gpu_bind()
1806 spin_lock_init(&gpu->fence_spinlock); in etnaviv_gpu_bind()
1808 INIT_WORK(&gpu->sync_point_work, sync_point_worker); in etnaviv_gpu_bind()
1809 init_waitqueue_head(&gpu->fence_event); in etnaviv_gpu_bind()
1811 priv->gpu[priv->num_gpus++] = gpu; in etnaviv_gpu_bind()
1819 destroy_workqueue(gpu->wq); in etnaviv_gpu_bind()
1823 thermal_cooling_device_unregister(gpu->cooling); in etnaviv_gpu_bind()
1833 DBG("%s", dev_name(gpu->dev)); in etnaviv_gpu_unbind()
1835 destroy_workqueue(gpu->wq); in etnaviv_gpu_unbind()
1840 pm_runtime_get_sync(gpu->dev); in etnaviv_gpu_unbind()
1841 pm_runtime_put_sync_suspend(gpu->dev); in etnaviv_gpu_unbind()
1847 if (gpu->mmu_context) in etnaviv_gpu_unbind()
1848 etnaviv_iommu_context_put(gpu->mmu_context); in etnaviv_gpu_unbind()
1850 etnaviv_cmdbuf_free(&gpu->buffer); in etnaviv_gpu_unbind()
1853 gpu->drm = NULL; in etnaviv_gpu_unbind()
1854 xa_destroy(&gpu->user_fences); in etnaviv_gpu_unbind()
1857 thermal_cooling_device_unregister(gpu->cooling); in etnaviv_gpu_unbind()
1858 gpu->cooling = NULL; in etnaviv_gpu_unbind()
1876 struct device *dev = &pdev->dev; in etnaviv_gpu_platform_probe()
1882 return -ENOMEM; in etnaviv_gpu_platform_probe()
1884 gpu->dev = dev; in etnaviv_gpu_platform_probe()
1885 mutex_init(&gpu->lock); in etnaviv_gpu_platform_probe()
1886 mutex_init(&gpu->sched_lock); in etnaviv_gpu_platform_probe()
1889 gpu->mmio = devm_platform_ioremap_resource(pdev, 0); in etnaviv_gpu_platform_probe()
1890 if (IS_ERR(gpu->mmio)) in etnaviv_gpu_platform_probe()
1891 return PTR_ERR(gpu->mmio); in etnaviv_gpu_platform_probe()
1895 gpu->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); in etnaviv_gpu_platform_probe()
1896 if (IS_ERR(gpu->rst)) in etnaviv_gpu_platform_probe()
1897 return dev_err_probe(dev, PTR_ERR(gpu->rst), in etnaviv_gpu_platform_probe()
1900 err = reset_control_assert(gpu->rst); in etnaviv_gpu_platform_probe()
1905 gpu->irq = platform_get_irq(pdev, 0); in etnaviv_gpu_platform_probe()
1906 if (gpu->irq < 0) in etnaviv_gpu_platform_probe()
1907 return gpu->irq; in etnaviv_gpu_platform_probe()
1909 err = devm_request_irq(dev, gpu->irq, irq_handler, 0, in etnaviv_gpu_platform_probe()
1912 dev_err(dev, "failed to request IRQ%u: %d\n", gpu->irq, err); in etnaviv_gpu_platform_probe()
1917 gpu->clk_reg = devm_clk_get_optional(&pdev->dev, "reg"); in etnaviv_gpu_platform_probe()
1918 DBG("clk_reg: %p", gpu->clk_reg); in etnaviv_gpu_platform_probe()
1919 if (IS_ERR(gpu->clk_reg)) in etnaviv_gpu_platform_probe()
1920 return PTR_ERR(gpu->clk_reg); in etnaviv_gpu_platform_probe()
1922 gpu->clk_bus = devm_clk_get_optional(&pdev->dev, "bus"); in etnaviv_gpu_platform_probe()
1923 DBG("clk_bus: %p", gpu->clk_bus); in etnaviv_gpu_platform_probe()
1924 if (IS_ERR(gpu->clk_bus)) in etnaviv_gpu_platform_probe()
1925 return PTR_ERR(gpu->clk_bus); in etnaviv_gpu_platform_probe()
1927 gpu->clk_core = devm_clk_get(&pdev->dev, "core"); in etnaviv_gpu_platform_probe()
1928 DBG("clk_core: %p", gpu->clk_core); in etnaviv_gpu_platform_probe()
1929 if (IS_ERR(gpu->clk_core)) in etnaviv_gpu_platform_probe()
1930 return PTR_ERR(gpu->clk_core); in etnaviv_gpu_platform_probe()
1931 gpu->base_rate_core = clk_get_rate(gpu->clk_core); in etnaviv_gpu_platform_probe()
1933 gpu->clk_shader = devm_clk_get_optional(&pdev->dev, "shader"); in etnaviv_gpu_platform_probe()
1934 DBG("clk_shader: %p", gpu->clk_shader); in etnaviv_gpu_platform_probe()
1935 if (IS_ERR(gpu->clk_shader)) in etnaviv_gpu_platform_probe()
1936 return PTR_ERR(gpu->clk_shader); in etnaviv_gpu_platform_probe()
1937 gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); in etnaviv_gpu_platform_probe()
1962 struct etnaviv_gpu *gpu = dev_get_drvdata(&pdev->dev); in etnaviv_gpu_platform_remove()
1964 component_del(&pdev->dev, &gpu_ops); in etnaviv_gpu_platform_remove()
1965 pm_runtime_disable(&pdev->dev); in etnaviv_gpu_platform_remove()
1967 mutex_destroy(&gpu->lock); in etnaviv_gpu_platform_remove()
1968 mutex_destroy(&gpu->sched_lock); in etnaviv_gpu_platform_remove()
1977 if (atomic_read(&gpu->sched.credit_count)) in etnaviv_gpu_rpm_suspend()
1978 return -EBUSY; in etnaviv_gpu_rpm_suspend()
1981 mask = gpu->idle_mask & ~(VIVS_HI_IDLE_STATE_FE | in etnaviv_gpu_rpm_suspend()
1987 return -EBUSY; in etnaviv_gpu_rpm_suspend()
1992 gpu->state = ETNA_GPU_STATE_IDENTIFIED; in etnaviv_gpu_rpm_suspend()
2006 /* Re-initialise the basic hardware state */ in etnaviv_gpu_rpm_resume()
2007 if (gpu->state == ETNA_GPU_STATE_IDENTIFIED) { in etnaviv_gpu_rpm_resume()
2024 .name = "etnaviv-gpu",