Lines Matching +full:lvds +full:- +full:4 +full:bits
1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/bits.h>
12 #include <linux/media-bus-format.h>
31 /* -----------------------------------------------------------------------------
32 * LVDS registers
35 /* LVDS software reset registers */
39 /* LVDS system configuration registers */
45 /* LVDS test pattern gen control registers */
50 #define OUT_MAP BIT(4)
51 #define VESA BIT(4)
65 /* -----------------------------------------------------------------------------
73 #define SOFTA_RST BIT(4)
82 #define TXVIDSTABLE BIT(4)
104 #define DDC_WAITBUS BIT(4)
110 #define HDMI_REG_LVDS_PORT 0x1d /* LVDS input control I2C addr */
114 /* -----------------------------------------------------------------------------
121 #define AFE_DRV_RST BIT(4)
125 #define AFE_XP_ER0 BIT(4)
145 #define HDMI_COLOR_DEPTH GENMASK(6, 4)
146 #define HDMI_COLOR_DEPTH_24 FIELD_PREP(HDMI_COLOR_DEPTH, 4)
153 /* -----------------------------------------------------------------------------
173 #define HDMI_AVI_DB_CHUNK1_SIZE (HDMI_REG_AVI_DB5 - HDMI_REG_AVI_DB1 + 1)
174 #define HDMI_AVI_DB_CHUNK2_SIZE (HDMI_REG_AVI_DB13 - HDMI_REG_AVI_DB6 + 1)
176 /* IT6263 data sheet Rev0.8: LVDS RX supports input clock rate up to 150MHz. */
287 .name = "it6263-hdmi",
328 .name = "it6263-lvds",
345 struct device *dev = it->dev; in it6263_parse_dt()
349 it->lvds_data_mapping = drm_of_lvds_get_data_mapping(dev->of_node); in it6263_parse_dt()
350 if (it->lvds_data_mapping < 0) { in it6263_parse_dt()
352 dev->of_node, "data-mapping", it->lvds_data_mapping); in it6263_parse_dt()
353 return it->lvds_data_mapping; in it6263_parse_dt()
356 it->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 2, 0); in it6263_parse_dt()
357 if (IS_ERR(it->next_bridge)) in it6263_parse_dt()
358 return dev_err_probe(dev, PTR_ERR(it->next_bridge), in it6263_parse_dt()
361 port0 = of_graph_get_port_by_id(dev->of_node, 0); in it6263_parse_dt()
362 port1 = of_graph_get_port_by_id(dev->of_node, 1); in it6263_parse_dt()
366 it->lvds_dual_link = true; in it6263_parse_dt()
374 it->lvds_link12_swap = true; in it6263_parse_dt()
377 ret = -EINVAL; in it6263_parse_dt()
378 dev_err(dev, "single input LVDS port1 is not supported\n"); in it6263_parse_dt()
380 ret = -EINVAL; in it6263_parse_dt()
381 dev_err(dev, "no input LVDS port\n"); in it6263_parse_dt()
409 ret = regmap_write(it->hdmi_regmap, HDMI_REG_LVDS_PORT, in it6263_lvds_set_i2c_addr()
414 return regmap_write(it->hdmi_regmap, HDMI_REG_LVDS_PORT_EN, BIT(0)); in it6263_lvds_set_i2c_addr()
420 regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, BIT(0), 0x0); in it6263_lvds_reset()
422 regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, BIT(0), BIT(0)); in it6263_lvds_reset()
425 regmap_write_bits(it->lvds_regmap, LVDS_REG_05, REG_SOFT_P_RST, in it6263_lvds_reset()
428 regmap_write_bits(it->lvds_regmap, LVDS_REG_05, REG_SOFT_P_RST, 0x0); in it6263_lvds_reset()
447 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_COL_DEP, BIT8); in it6263_lvds_set_interface()
449 if (it->lvds_data_mapping == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG) in it6263_lvds_set_interface()
455 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, OUT_MAP, fmt); in it6263_lvds_set_interface()
457 if (it->lvds_dual_link) { in it6263_lvds_set_interface()
458 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, DISO); in it6263_lvds_set_interface()
459 regmap_write_bits(it->lvds_regmap, LVDS_REG_52, BIT(1), BIT(1)); in it6263_lvds_set_interface()
461 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, DMODE, SISO); in it6263_lvds_set_interface()
462 regmap_write_bits(it->lvds_regmap, LVDS_REG_52, BIT(1), 0); in it6263_lvds_set_interface()
468 regmap_write(it->lvds_regmap, LVDS_REG_3C, 0xaa); in it6263_lvds_set_afe()
469 regmap_write(it->lvds_regmap, LVDS_REG_3F, 0x02); in it6263_lvds_set_afe()
470 regmap_write(it->lvds_regmap, LVDS_REG_47, 0xaa); in it6263_lvds_set_afe()
471 regmap_write(it->lvds_regmap, LVDS_REG_48, 0x02); in it6263_lvds_set_afe()
472 regmap_write(it->lvds_regmap, LVDS_REG_4F, 0x11); in it6263_lvds_set_afe()
474 regmap_write_bits(it->lvds_regmap, LVDS_REG_0B, REG_SSC_PCLK_RF, in it6263_lvds_set_afe()
476 regmap_write_bits(it->lvds_regmap, LVDS_REG_3C, 0x07, 0); in it6263_lvds_set_afe()
477 regmap_write_bits(it->lvds_regmap, LVDS_REG_2C, REG_DESSC_ENB, in it6263_lvds_set_afe()
483 regmap_write_bits(it->lvds_regmap, LVDS_REG_0B, REG_LVDS_IN_SWAP, in it6263_lvds_sys_cfg()
484 it->lvds_link12_swap ? REG_LVDS_IN_SWAP : 0); in it6263_lvds_sys_cfg()
497 regmap_write(it->hdmi_regmap, HDMI_REG_SW_RST, HDMI_RST_ALL); in it6263_hdmi_config()
498 regmap_write(it->hdmi_regmap, HDMI_REG_INPUT_MODE, IN_RGB); in it6263_hdmi_config()
499 regmap_write_bits(it->hdmi_regmap, HDMI_REG_GCP, HDMI_COLOR_DEPTH, in it6263_hdmi_config()
507 regmap_read(it->hdmi_regmap, HDMI_REG_SYS_STATUS, &val); in it6263_detect()
517 struct regmap *regmap = it->hdmi_regmap; in it6263_read_edid()
535 dev_err(it->dev, "failed to clear DDC FIFO:%d\n", ret); in it6263_read_edid()
547 len -= count; in it6263_read_edid()
553 dev_err(it->dev, "failed to read EDID:%d\n", ret); in it6263_read_edid()
558 dev_err(it->dev, "DDC error\n"); in it6263_read_edid()
559 return -EIO; in it6263_read_edid()
563 for (; count > 0; count--) { in it6263_read_edid()
578 regmap_write_bits(it->hdmi_regmap, HDMI_REG_GCP, AVMUTE, AVMUTE); in it6263_bridge_atomic_disable()
579 regmap_write(it->hdmi_regmap, HDMI_REG_PKT_GENERAL_CTRL, 0); in it6263_bridge_atomic_disable()
580 regmap_write(it->hdmi_regmap, HDMI_REG_AFE_DRV_CTRL, in it6263_bridge_atomic_disable()
588 struct drm_atomic_state *state = old_bridge_state->base.state; in it6263_bridge_atomic_enable()
591 struct regmap *regmap = it->hdmi_regmap; in it6263_bridge_atomic_enable()
601 bridge->encoder); in it6263_bridge_atomic_enable()
602 crtc = drm_atomic_get_new_connector_state(state, connector)->crtc; in it6263_bridge_atomic_enable()
604 mode = &crtc_state->adjusted_mode; in it6263_bridge_atomic_enable()
611 pclk_high = mode->clock > HIGH_PIXEL_CLOCK_KHZ; in it6263_bridge_atomic_enable()
632 /* reconfigure LVDS and retry several times in case video is instable */ in it6263_bridge_atomic_enable()
646 dev_warn(it->dev, "failed to wait for video stable\n"); in it6263_bridge_atomic_enable()
667 return bridge->funcs->hdmi_tmds_char_rate_valid(bridge, mode, rate); in it6263_bridge_mode_valid()
677 ret = drm_bridge_attach(bridge->encoder, it->next_bridge, bridge, in it6263_bridge_attach()
685 connector = drm_bridge_connector_init(bridge->dev, bridge->encoder); in it6263_bridge_attach()
688 dev_err(it->dev, "failed to initialize bridge connector: %d\n", in it6263_bridge_attach()
693 drm_connector_attach_encoder(connector, bridge->encoder); in it6263_bridge_attach()
727 if (!it6263_is_input_bus_fmt_valid(it->lvds_data_mapping)) in it6263_bridge_atomic_get_input_bus_fmts()
734 input_fmts[0] = it->lvds_data_mapping; in it6263_bridge_atomic_get_input_bus_fmts()
745 if (mode->clock > MAX_PIXEL_CLOCK_KHZ) in it6263_hdmi_tmds_char_rate_valid()
760 regmap_write(it->hdmi_regmap, HDMI_REG_AVI_INFOFRM_CTRL, 0); in it6263_hdmi_clear_infoframe()
762 dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type); in it6263_hdmi_clear_infoframe()
772 struct regmap *regmap = it->hdmi_regmap; in it6263_hdmi_write_infoframe()
775 dev_dbg(it->dev, "unsupported HDMI infoframe 0x%x\n", type); in it6263_hdmi_write_infoframe()
779 /* write the first AVI infoframe data byte chunk(DB1-DB5) */ in it6263_hdmi_write_infoframe()
784 /* write the second AVI infoframe data byte chunk(DB6-DB13) */ in it6263_hdmi_write_infoframe()
816 struct device *dev = &client->dev; in it6263_probe()
823 return -ENOMEM; in it6263_probe()
825 it->dev = dev; in it6263_probe()
826 it->hdmi_i2c = client; in it6263_probe()
828 it->hdmi_regmap = devm_regmap_init_i2c(client, in it6263_probe()
830 if (IS_ERR(it->hdmi_regmap)) in it6263_probe()
831 return dev_err_probe(dev, PTR_ERR(it->hdmi_regmap), in it6263_probe()
854 it->lvds_i2c = devm_i2c_new_dummy_device(dev, client->adapter, in it6263_probe()
856 if (IS_ERR(it->lvds_i2c)) in it6263_probe()
857 return dev_err_probe(it->dev, PTR_ERR(it->lvds_i2c), in it6263_probe()
858 "failed to allocate I2C device for LVDS\n"); in it6263_probe()
860 it->lvds_regmap = devm_regmap_init_i2c(it->lvds_i2c, in it6263_probe()
862 if (IS_ERR(it->lvds_regmap)) in it6263_probe()
863 return dev_err_probe(dev, PTR_ERR(it->lvds_regmap), in it6263_probe()
864 "failed to init I2C regmap for LVDS\n"); in it6263_probe()
871 it->bridge.funcs = &it6263_bridge_funcs; in it6263_probe()
872 it->bridge.of_node = dev->of_node; in it6263_probe()
874 it->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | in it6263_probe()
876 it->bridge.type = DRM_MODE_CONNECTOR_HDMIA; in it6263_probe()
877 it->bridge.vendor = "ITE"; in it6263_probe()
878 it->bridge.product = "IT6263"; in it6263_probe()
880 return devm_drm_bridge_add(dev, &it->bridge); in it6263_probe()
905 MODULE_DESCRIPTION("ITE Tech. Inc. IT6263 LVDS/HDMI bridge");