Lines Matching full:phy_cfg
70 struct phy_configure_opts_lvds *phy_cfg) in imx8qm_ldb_set_phy_cfg() argument
72 phy_cfg->bits_per_lane_and_dclk_cycle = 7; in imx8qm_ldb_set_phy_cfg()
73 phy_cfg->lanes = 4; in imx8qm_ldb_set_phy_cfg()
74 phy_cfg->differential_clk_rate = is_split ? di_clk / 2 : di_clk; in imx8qm_ldb_set_phy_cfg()
75 phy_cfg->is_slave = is_slave; in imx8qm_ldb_set_phy_cfg()
92 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qm_ldb_bridge_atomic_check() local
100 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg); in imx8qm_ldb_bridge_atomic_check()
112 phy_cfg); in imx8qm_ldb_bridge_atomic_check()
139 struct phy_configure_opts_lvds *phy_cfg = &opts.lvds; in imx8qm_ldb_bridge_mode_set() local
154 imx8qm_ldb_set_phy_cfg(imx8qm_ldb, di_clk, is_split, false, phy_cfg); in imx8qm_ldb_bridge_mode_set()
163 phy_cfg); in imx8qm_ldb_bridge_mode_set()