Lines Matching +full:sync +full:- +full:clk +full:- +full:ps
1 /* SPDX-License-Identifier: GPL-2.0-only */
62 #define ADV7511_REG_GC(x) (0x4b + (x)) /* 0x4b - 0x51 */
66 #define ADV7511_REG_AVI_INFOFRAME(x) (0x55 + (x)) /* 0x55 - 0x6f */
70 #define ADV7511_REG_AUDIO_INFOFRAME(x) (0x73 + (x)) /* 0x73 - 0x7c */
77 #define ADV7511_REG_AN(x) (0xb0 + (x)) /* 0xb0 - 0xb7 */
80 #define ADV7511_REG_BKSV(x) (0xc0 + (x)) /* 0xc0 - 0xc3 */
84 #define ADV7511_REG_BSTATUS(x) (0xca + (x)) /* 0xca - 0xcb */
89 #define ADV7511_REG_SYNC_ADJUSTMENT(x) (0xd7 + (x)) /* 0xd7 - 0xdc */
251 * enum adv7511_sync_polarity - Polarity for the input sync signals
252 * @ADV7511_SYNC_POLARITY_PASSTHROUGH: Sync polarity matches that of
254 * @ADV7511_SYNC_POLARITY_LOW: Sync polarity is low
255 * @ADV7511_SYNC_POLARITY_HIGH: Sync polarity is high
258 * ADV7511 to internally invert the sync signal if required to match the sync
263 * the sync signals with the correct polarity.
272 * struct adv7511_link_config - Describes adv7511 hardware configuration
278 * @clock_delay: Clock delay for the input clock (in ps)
279 * @embedded_sync: Video input uses BT.656-style embedded sync
280 * @sync_pulse: Select the sync pulse
300 * enum adv7511_csc_scaling - Scaling factor for the ADV7511 CSC
312 * struct adv7511_video_config - Describes adv7511 hardware configuration
398 struct clk *cec_clk;
408 regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL, in adv7511_cec_init()