Lines Matching +full:layer +full:- +full:primary
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
10 #include <linux/mfd/atmel-hlcdc.h>
23 * struct atmel_hlcdc_plane_state - Atmel HLCDC Plane state structure.
189 return -ENOTSUPP; in atmel_hlcdc_format_to_plane_mode()
264 factor = (256 * ((8 * (srcsize - 1)) - phidef)) / (dstsize - 1); in atmel_hlcdc_plane_phiscaler_get_factor()
265 max_memsize = ((factor * (dstsize - 1)) + (256 * phidef)) / 2048; in atmel_hlcdc_plane_phiscaler_get_factor()
267 if (max_memsize > srcsize - 1) in atmel_hlcdc_plane_phiscaler_get_factor()
268 factor--; in atmel_hlcdc_plane_phiscaler_get_factor()
281 atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i, in atmel_hlcdc_plane_scaler_set_phicoeff()
289 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_setup_scaler()
292 if (!desc->layout.scaler_config) in atmel_hlcdc_plane_setup_scaler()
295 if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { in atmel_hlcdc_plane_setup_scaler()
296 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_setup_scaler()
297 desc->layout.scaler_config, 0); in atmel_hlcdc_plane_setup_scaler()
301 if (desc->layout.phicoeffs.x) { in atmel_hlcdc_plane_setup_scaler()
302 xfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_w, in atmel_hlcdc_plane_setup_scaler()
303 state->crtc_w, in atmel_hlcdc_plane_setup_scaler()
306 yfactor = atmel_hlcdc_plane_phiscaler_get_factor(state->src_h, in atmel_hlcdc_plane_setup_scaler()
307 state->crtc_h, in atmel_hlcdc_plane_setup_scaler()
311 state->crtc_w < state->src_w ? in atmel_hlcdc_plane_setup_scaler()
315 desc->layout.phicoeffs.x); in atmel_hlcdc_plane_setup_scaler()
318 state->crtc_h < state->src_h ? in atmel_hlcdc_plane_setup_scaler()
322 desc->layout.phicoeffs.y); in atmel_hlcdc_plane_setup_scaler()
324 xfactor = (1024 * state->src_w) / state->crtc_w; in atmel_hlcdc_plane_setup_scaler()
325 yfactor = (1024 * state->src_h) / state->crtc_h; in atmel_hlcdc_plane_setup_scaler()
328 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config, in atmel_hlcdc_plane_setup_scaler()
338 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_xlcdc_plane_setup_scaler()
341 if (!desc->layout.scaler_config) in atmel_xlcdc_plane_setup_scaler()
344 if (state->crtc_w == state->src_w && state->crtc_h == state->src_h) { in atmel_xlcdc_plane_setup_scaler()
345 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_xlcdc_plane_setup_scaler()
346 desc->layout.scaler_config, 0); in atmel_xlcdc_plane_setup_scaler()
351 xfactor = (u32)(((1 << 20) * state->src_w) / state->crtc_w); in atmel_xlcdc_plane_setup_scaler()
354 yfactor = (u32)(((1 << 20) * state->src_h) / state->crtc_h); in atmel_xlcdc_plane_setup_scaler()
356 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config, in atmel_xlcdc_plane_setup_scaler()
362 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 1, in atmel_xlcdc_plane_setup_scaler()
364 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 3, in atmel_xlcdc_plane_setup_scaler()
372 if (state->base.fb->format->format == DRM_FORMAT_YUV420) { in atmel_xlcdc_plane_setup_scaler()
377 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 2, in atmel_xlcdc_plane_setup_scaler()
379 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 4, in atmel_xlcdc_plane_setup_scaler()
387 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_update_pos_and_size()
388 struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private; in atmel_hlcdc_plane_update_pos_and_size()
390 if (desc->layout.size) in atmel_hlcdc_plane_update_pos_and_size()
391 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size, in atmel_hlcdc_plane_update_pos_and_size()
392 ATMEL_HLCDC_LAYER_SIZE(state->crtc_w, in atmel_hlcdc_plane_update_pos_and_size()
393 state->crtc_h)); in atmel_hlcdc_plane_update_pos_and_size()
395 if (desc->layout.memsize) in atmel_hlcdc_plane_update_pos_and_size()
396 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_update_pos_and_size()
397 desc->layout.memsize, in atmel_hlcdc_plane_update_pos_and_size()
398 ATMEL_HLCDC_LAYER_SIZE(state->src_w, in atmel_hlcdc_plane_update_pos_and_size()
399 state->src_h)); in atmel_hlcdc_plane_update_pos_and_size()
401 if (desc->layout.pos) in atmel_hlcdc_plane_update_pos_and_size()
402 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.pos, in atmel_hlcdc_plane_update_pos_and_size()
403 ATMEL_HLCDC_LAYER_POS(state->crtc_x, in atmel_hlcdc_plane_update_pos_and_size()
404 state->crtc_y)); in atmel_hlcdc_plane_update_pos_and_size()
406 dc->desc->ops->plane_setup_scaler(plane, state); in atmel_hlcdc_plane_update_pos_and_size()
413 unsigned int cfg = ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16 | state->ahb_id; in atmel_hlcdc_plane_update_general_settings()
414 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_update_general_settings()
415 const struct drm_format_info *format = state->base.fb->format; in atmel_hlcdc_plane_update_general_settings()
421 if (format->format == DRM_FORMAT_RGB888) in atmel_hlcdc_plane_update_general_settings()
424 atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG, in atmel_hlcdc_plane_update_general_settings()
429 if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) { in atmel_hlcdc_plane_update_general_settings()
433 if (format->has_alpha) in atmel_hlcdc_plane_update_general_settings()
437 ATMEL_HLCDC_LAYER_GA(state->base.alpha); in atmel_hlcdc_plane_update_general_settings()
440 if (state->disc_h && state->disc_w) in atmel_hlcdc_plane_update_general_settings()
443 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config, in atmel_hlcdc_plane_update_general_settings()
451 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_xlcdc_plane_update_general_settings()
452 const struct drm_format_info *format = state->base.fb->format; in atmel_xlcdc_plane_update_general_settings()
455 atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_XLCDC_LAYER_DMA_CFG, in atmel_xlcdc_plane_update_general_settings()
456 ATMEL_HLCDC_LAYER_DMA_BLEN_INCR16 | state->ahb_id); in atmel_xlcdc_plane_update_general_settings()
460 if (plane->base.type != DRM_PLANE_TYPE_PRIMARY) { in atmel_xlcdc_plane_update_general_settings()
468 if (format->has_alpha) in atmel_xlcdc_plane_update_general_settings()
471 cfg |= ATMEL_XLCDC_LAYER_A0(state->base.alpha); in atmel_xlcdc_plane_update_general_settings()
474 if (state->disc_h && state->disc_w) in atmel_xlcdc_plane_update_general_settings()
477 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.general_config, in atmel_xlcdc_plane_update_general_settings()
487 ret = atmel_hlcdc_format_to_plane_mode(state->base.fb->format->format, in atmel_hlcdc_plane_update_format()
492 if ((state->base.fb->format->format == DRM_FORMAT_YUV422 || in atmel_hlcdc_plane_update_format()
493 state->base.fb->format->format == DRM_FORMAT_NV61) && in atmel_hlcdc_plane_update_format()
494 drm_rotation_90_or_270(state->base.rotation)) in atmel_hlcdc_plane_update_format()
497 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_update_format()
504 struct drm_crtc *crtc = state->base.crtc; in atmel_hlcdc_plane_update_clut()
508 if (!crtc || !crtc->state) in atmel_hlcdc_plane_update_clut()
511 if (!crtc->state->color_mgmt_changed || !crtc->state->gamma_lut) in atmel_hlcdc_plane_update_clut()
514 lut = (struct drm_color_lut *)crtc->state->gamma_lut->data; in atmel_hlcdc_plane_update_clut()
517 u32 val = ((lut->red << 8) & 0xff0000) | in atmel_hlcdc_plane_update_clut()
518 (lut->green & 0xff00) | in atmel_hlcdc_plane_update_clut()
519 (lut->blue >> 8); in atmel_hlcdc_plane_update_clut()
521 atmel_hlcdc_layer_write_clut(&plane->layer, idx, val); in atmel_hlcdc_plane_update_clut()
529 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_hlcdc_update_buffers()
531 state->dscrs[i]->self); in atmel_hlcdc_update_buffers()
536 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_hlcdc_update_buffers()
538 state->dscrs[i]->addr); in atmel_hlcdc_update_buffers()
539 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_hlcdc_update_buffers()
541 state->dscrs[i]->ctrl); in atmel_hlcdc_update_buffers()
542 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_hlcdc_update_buffers()
544 state->dscrs[i]->self); in atmel_hlcdc_update_buffers()
551 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_xlcdc_update_buffers()
553 state->dscrs[i]->addr); in atmel_xlcdc_update_buffers()
559 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_update_buffers()
560 struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private; in atmel_hlcdc_plane_update_buffers()
561 struct drm_framebuffer *fb = state->base.fb; in atmel_hlcdc_plane_update_buffers()
565 if (!dc->desc->is_xlcdc) in atmel_hlcdc_plane_update_buffers()
566 sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); in atmel_hlcdc_plane_update_buffers()
568 for (i = 0; i < state->nplanes; i++) { in atmel_hlcdc_plane_update_buffers()
571 state->dscrs[i]->addr = gem->dma_addr + state->offsets[i]; in atmel_hlcdc_plane_update_buffers()
573 dc->desc->ops->lcdc_update_buffers(plane, state, sr, i); in atmel_hlcdc_plane_update_buffers()
575 if (desc->layout.xstride[i]) in atmel_hlcdc_plane_update_buffers()
576 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_update_buffers()
577 desc->layout.xstride[i], in atmel_hlcdc_plane_update_buffers()
578 state->xstride[i]); in atmel_hlcdc_plane_update_buffers()
580 if (desc->layout.pstride[i]) in atmel_hlcdc_plane_update_buffers()
581 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_update_buffers()
582 desc->layout.pstride[i], in atmel_hlcdc_plane_update_buffers()
583 state->pstride[i]); in atmel_hlcdc_plane_update_buffers()
598 plane_s = drm_atomic_get_plane_state(c_state->state, plane); in atmel_hlcdc_plane_prepare_ahb_routing()
605 pixels = (plane_state->src_w * plane_state->src_h) - in atmel_hlcdc_plane_prepare_ahb_routing()
606 (plane_state->disc_w * plane_state->disc_h); in atmel_hlcdc_plane_prepare_ahb_routing()
608 for (i = 0; i < plane_state->nplanes; i++) in atmel_hlcdc_plane_prepare_ahb_routing()
609 load += pixels * plane_state->bpp[i]; in atmel_hlcdc_plane_prepare_ahb_routing()
612 plane_state->ahb_id = 0; in atmel_hlcdc_plane_prepare_ahb_routing()
614 plane_state->ahb_id = 1; in atmel_hlcdc_plane_prepare_ahb_routing()
616 ahb_load[plane_state->ahb_id] += load; in atmel_hlcdc_plane_prepare_ahb_routing()
629 struct atmel_hlcdc_plane *primary; in atmel_hlcdc_plane_prepare_disc_area() local
632 primary = drm_plane_to_atmel_hlcdc_plane(c_state->crtc->primary); in atmel_hlcdc_plane_prepare_disc_area()
633 layout = &primary->layer.desc->layout; in atmel_hlcdc_plane_prepare_disc_area()
634 if (!layout->disc_pos || !layout->disc_size) in atmel_hlcdc_plane_prepare_disc_area()
637 primary_s = drm_atomic_get_plane_state(c_state->state, in atmel_hlcdc_plane_prepare_disc_area()
638 &primary->base); in atmel_hlcdc_plane_prepare_disc_area()
648 if (ovl == c_state->crtc->primary) in atmel_hlcdc_plane_prepare_disc_area()
651 ovl_s = drm_atomic_get_plane_state(c_state->state, ovl); in atmel_hlcdc_plane_prepare_disc_area()
657 if (!ovl_s->visible || in atmel_hlcdc_plane_prepare_disc_area()
658 !ovl_s->fb || in atmel_hlcdc_plane_prepare_disc_area()
659 ovl_s->fb->format->has_alpha || in atmel_hlcdc_plane_prepare_disc_area()
660 ovl_s->alpha != DRM_BLEND_ALPHA_OPAQUE) in atmel_hlcdc_plane_prepare_disc_area()
664 if (ovl_state->crtc_h * ovl_state->crtc_w < disc_h * disc_w) in atmel_hlcdc_plane_prepare_disc_area()
667 disc_x = ovl_state->crtc_x; in atmel_hlcdc_plane_prepare_disc_area()
668 disc_y = ovl_state->crtc_y; in atmel_hlcdc_plane_prepare_disc_area()
669 disc_h = ovl_state->crtc_h; in atmel_hlcdc_plane_prepare_disc_area()
670 disc_w = ovl_state->crtc_w; in atmel_hlcdc_plane_prepare_disc_area()
673 primary_state->disc_x = disc_x; in atmel_hlcdc_plane_prepare_disc_area()
674 primary_state->disc_y = disc_y; in atmel_hlcdc_plane_prepare_disc_area()
675 primary_state->disc_w = disc_w; in atmel_hlcdc_plane_prepare_disc_area()
676 primary_state->disc_h = disc_h; in atmel_hlcdc_plane_prepare_disc_area()
687 layout = &plane->layer.desc->layout; in atmel_hlcdc_plane_update_disc_area()
688 if (!layout->disc_pos || !layout->disc_size) in atmel_hlcdc_plane_update_disc_area()
691 atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_pos, in atmel_hlcdc_plane_update_disc_area()
692 ATMEL_HLCDC_LAYER_DISC_POS(state->disc_x, in atmel_hlcdc_plane_update_disc_area()
693 state->disc_y)); in atmel_hlcdc_plane_update_disc_area()
695 atmel_hlcdc_layer_write_cfg(&plane->layer, layout->disc_size, in atmel_hlcdc_plane_update_disc_area()
696 ATMEL_HLCDC_LAYER_DISC_SIZE(state->disc_w, in atmel_hlcdc_plane_update_disc_area()
697 state->disc_h)); in atmel_hlcdc_plane_update_disc_area()
707 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_atomic_check()
708 struct drm_framebuffer *fb = hstate->base.fb; in atmel_hlcdc_plane_atomic_check()
714 if (!hstate->base.crtc || WARN_ON(!fb)) in atmel_hlcdc_plane_atomic_check()
717 crtc_state = drm_atomic_get_existing_crtc_state(state, s->crtc); in atmel_hlcdc_plane_atomic_check()
718 mode = &crtc_state->adjusted_mode; in atmel_hlcdc_plane_atomic_check()
723 if (ret || !s->visible) in atmel_hlcdc_plane_atomic_check()
726 hstate->src_x = s->src.x1; in atmel_hlcdc_plane_atomic_check()
727 hstate->src_y = s->src.y1; in atmel_hlcdc_plane_atomic_check()
728 hstate->src_w = drm_rect_width(&s->src); in atmel_hlcdc_plane_atomic_check()
729 hstate->src_h = drm_rect_height(&s->src); in atmel_hlcdc_plane_atomic_check()
730 hstate->crtc_x = s->dst.x1; in atmel_hlcdc_plane_atomic_check()
731 hstate->crtc_y = s->dst.y1; in atmel_hlcdc_plane_atomic_check()
732 hstate->crtc_w = drm_rect_width(&s->dst); in atmel_hlcdc_plane_atomic_check()
733 hstate->crtc_h = drm_rect_height(&s->dst); in atmel_hlcdc_plane_atomic_check()
735 if ((hstate->src_x | hstate->src_y | hstate->src_w | hstate->src_h) & in atmel_hlcdc_plane_atomic_check()
737 return -EINVAL; in atmel_hlcdc_plane_atomic_check()
739 hstate->src_x >>= 16; in atmel_hlcdc_plane_atomic_check()
740 hstate->src_y >>= 16; in atmel_hlcdc_plane_atomic_check()
741 hstate->src_w >>= 16; in atmel_hlcdc_plane_atomic_check()
742 hstate->src_h >>= 16; in atmel_hlcdc_plane_atomic_check()
744 hstate->nplanes = fb->format->num_planes; in atmel_hlcdc_plane_atomic_check()
745 if (hstate->nplanes > ATMEL_HLCDC_LAYER_MAX_PLANES) in atmel_hlcdc_plane_atomic_check()
746 return -EINVAL; in atmel_hlcdc_plane_atomic_check()
748 for (i = 0; i < hstate->nplanes; i++) { in atmel_hlcdc_plane_atomic_check()
750 int xdiv = i ? fb->format->hsub : 1; in atmel_hlcdc_plane_atomic_check()
751 int ydiv = i ? fb->format->vsub : 1; in atmel_hlcdc_plane_atomic_check()
753 hstate->bpp[i] = fb->format->cpp[i]; in atmel_hlcdc_plane_atomic_check()
754 if (!hstate->bpp[i]) in atmel_hlcdc_plane_atomic_check()
755 return -EINVAL; in atmel_hlcdc_plane_atomic_check()
757 switch (hstate->base.rotation & DRM_MODE_ROTATE_MASK) { in atmel_hlcdc_plane_atomic_check()
759 offset = (hstate->src_y / ydiv) * in atmel_hlcdc_plane_atomic_check()
760 fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
761 offset += ((hstate->src_x + hstate->src_w - 1) / in atmel_hlcdc_plane_atomic_check()
762 xdiv) * hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
763 hstate->xstride[i] = -(((hstate->src_h - 1) / ydiv) * in atmel_hlcdc_plane_atomic_check()
764 fb->pitches[i]) - in atmel_hlcdc_plane_atomic_check()
765 (2 * hstate->bpp[i]); in atmel_hlcdc_plane_atomic_check()
766 hstate->pstride[i] = fb->pitches[i] - hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
769 offset = ((hstate->src_y + hstate->src_h - 1) / in atmel_hlcdc_plane_atomic_check()
770 ydiv) * fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
771 offset += ((hstate->src_x + hstate->src_w - 1) / in atmel_hlcdc_plane_atomic_check()
772 xdiv) * hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
773 hstate->xstride[i] = ((((hstate->src_w - 1) / xdiv) - 1) * in atmel_hlcdc_plane_atomic_check()
774 hstate->bpp[i]) - fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
775 hstate->pstride[i] = -2 * hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
778 offset = ((hstate->src_y + hstate->src_h - 1) / in atmel_hlcdc_plane_atomic_check()
779 ydiv) * fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
780 offset += (hstate->src_x / xdiv) * hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
781 hstate->xstride[i] = ((hstate->src_h - 1) / ydiv) * in atmel_hlcdc_plane_atomic_check()
782 fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
783 hstate->pstride[i] = -fb->pitches[i] - hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
787 offset = (hstate->src_y / ydiv) * fb->pitches[i]; in atmel_hlcdc_plane_atomic_check()
788 offset += (hstate->src_x / xdiv) * hstate->bpp[i]; in atmel_hlcdc_plane_atomic_check()
789 hstate->xstride[i] = fb->pitches[i] - in atmel_hlcdc_plane_atomic_check()
790 ((hstate->src_w / xdiv) * in atmel_hlcdc_plane_atomic_check()
791 hstate->bpp[i]); in atmel_hlcdc_plane_atomic_check()
792 hstate->pstride[i] = 0; in atmel_hlcdc_plane_atomic_check()
796 hstate->offsets[i] = offset + fb->offsets[i]; in atmel_hlcdc_plane_atomic_check()
802 if (drm_rotation_90_or_270(hstate->base.rotation)) { in atmel_hlcdc_plane_atomic_check()
803 swap(hstate->src_w, hstate->src_h); in atmel_hlcdc_plane_atomic_check()
806 if (!desc->layout.size && in atmel_hlcdc_plane_atomic_check()
807 (mode->hdisplay != hstate->crtc_w || in atmel_hlcdc_plane_atomic_check()
808 mode->vdisplay != hstate->crtc_h)) in atmel_hlcdc_plane_atomic_check()
809 return -EINVAL; in atmel_hlcdc_plane_atomic_check()
811 if ((hstate->crtc_h != hstate->src_h || hstate->crtc_w != hstate->src_w) && in atmel_hlcdc_plane_atomic_check()
812 (!desc->layout.memsize || in atmel_hlcdc_plane_atomic_check()
813 hstate->base.fb->format->has_alpha)) in atmel_hlcdc_plane_atomic_check()
814 return -EINVAL; in atmel_hlcdc_plane_atomic_check()
822 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IDR, in atmel_hlcdc_atomic_disable()
825 /* Disable the layer */ in atmel_hlcdc_atomic_disable()
826 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHDR, in atmel_hlcdc_atomic_disable()
832 atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); in atmel_hlcdc_atomic_disable()
838 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_IDR, in atmel_xlcdc_atomic_disable()
841 /* Disable the layer */ in atmel_xlcdc_atomic_disable()
842 atmel_hlcdc_layer_write_reg(&plane->layer, in atmel_xlcdc_atomic_disable()
846 atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_XLCDC_LAYER_ISR); in atmel_xlcdc_atomic_disable()
853 struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private; in atmel_hlcdc_plane_atomic_disable()
855 dc->desc->ops->lcdc_atomic_disable(plane); in atmel_hlcdc_plane_atomic_disable()
864 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_IER, in atmel_hlcdc_atomic_update()
870 sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); in atmel_hlcdc_atomic_update()
871 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHER, in atmel_hlcdc_atomic_update()
881 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_IER, in atmel_xlcdc_atomic_update()
886 atmel_hlcdc_layer_write_reg(&plane->layer, ATMEL_XLCDC_LAYER_ENR, in atmel_xlcdc_atomic_update()
891 * (where xxx indicates each layer) requires writing one to the in atmel_xlcdc_atomic_update()
892 * Update Attribute field for each layer in LCDC_ATTRE register for SAM9X7. in atmel_xlcdc_atomic_update()
894 regmap_write(dc->hlcdc->regmap, ATMEL_XLCDC_ATTRE, ATMEL_XLCDC_BASE_UPDATE | in atmel_xlcdc_atomic_update()
907 struct atmel_hlcdc_dc *dc = p->dev->dev_private; in atmel_hlcdc_plane_atomic_update()
909 if (!new_s->crtc || !new_s->fb) in atmel_hlcdc_plane_atomic_update()
912 if (!hstate->base.visible) { in atmel_hlcdc_plane_atomic_update()
918 dc->desc->ops->lcdc_update_general_settings(plane, hstate); in atmel_hlcdc_plane_atomic_update()
924 dc->desc->ops->lcdc_atomic_update(plane, dc); in atmel_hlcdc_plane_atomic_update()
931 * TODO: declare a "yuv-to-rgb-conv-factors" property to let in atmel_hlcdc_csc_init()
941 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_csc_init()
942 desc->layout.csc + i, in atmel_hlcdc_csc_init()
951 * yuv-to-rgb-conv-factors are now defined from LCDC_HEOCFG16 to in atmel_xlcdc_csc_init()
965 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_xlcdc_csc_init()
966 desc->layout.csc + i, in atmel_xlcdc_csc_init()
970 if (desc->layout.vxs_config && desc->layout.hxs_config) { in atmel_xlcdc_csc_init()
975 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_xlcdc_csc_init()
976 desc->layout.vxs_config, in atmel_xlcdc_csc_init()
982 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_xlcdc_csc_init()
983 desc->layout.hxs_config, in atmel_xlcdc_csc_init()
993 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_init_properties()
994 struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private; in atmel_hlcdc_plane_init_properties()
996 if (desc->type == ATMEL_HLCDC_OVERLAY_LAYER || in atmel_hlcdc_plane_init_properties()
997 desc->type == ATMEL_HLCDC_CURSOR_LAYER) { in atmel_hlcdc_plane_init_properties()
1000 ret = drm_plane_create_alpha_property(&plane->base); in atmel_hlcdc_plane_init_properties()
1005 if (desc->layout.xstride[0] && desc->layout.pstride[0]) { in atmel_hlcdc_plane_init_properties()
1008 ret = drm_plane_create_rotation_property(&plane->base, in atmel_hlcdc_plane_init_properties()
1018 if (desc->layout.csc) in atmel_hlcdc_plane_init_properties()
1019 dc->desc->ops->lcdc_csc_init(plane, desc); in atmel_hlcdc_plane_init_properties()
1027 u32 isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_ISR); in atmel_hlcdc_irq_dbg()
1037 dev_dbg(plane->base.dev->dev, "overrun on plane %s\n", in atmel_hlcdc_irq_dbg()
1038 desc->name); in atmel_hlcdc_irq_dbg()
1044 u32 isr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_XLCDC_LAYER_ISR); in atmel_xlcdc_irq_dbg()
1054 dev_dbg(plane->base.dev->dev, "overrun on plane %s\n", in atmel_xlcdc_irq_dbg()
1055 desc->name); in atmel_xlcdc_irq_dbg()
1060 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_irq()
1061 struct atmel_hlcdc_dc *dc = plane->base.dev->dev_private; in atmel_hlcdc_plane_irq()
1063 dc->desc->ops->lcdc_irq_dbg(plane, desc); in atmel_hlcdc_plane_irq()
1095 struct atmel_hlcdc_dc *dc = p->dev->dev_private; in atmel_hlcdc_plane_alloc_dscrs()
1098 for (i = 0; i < ARRAY_SIZE(state->dscrs); i++) { in atmel_hlcdc_plane_alloc_dscrs()
1102 dscr = dma_pool_alloc(dc->dscrpool, GFP_KERNEL, &dscr_dma); in atmel_hlcdc_plane_alloc_dscrs()
1106 dscr->addr = 0; in atmel_hlcdc_plane_alloc_dscrs()
1107 dscr->next = dscr_dma; in atmel_hlcdc_plane_alloc_dscrs()
1108 dscr->self = dscr_dma; in atmel_hlcdc_plane_alloc_dscrs()
1109 dscr->ctrl = ATMEL_HLCDC_LAYER_DFETCH; in atmel_hlcdc_plane_alloc_dscrs()
1111 state->dscrs[i] = dscr; in atmel_hlcdc_plane_alloc_dscrs()
1117 for (i--; i >= 0; i--) { in atmel_hlcdc_plane_alloc_dscrs()
1118 dma_pool_free(dc->dscrpool, state->dscrs[i], in atmel_hlcdc_plane_alloc_dscrs()
1119 state->dscrs[i]->self); in atmel_hlcdc_plane_alloc_dscrs()
1122 return -ENOMEM; in atmel_hlcdc_plane_alloc_dscrs()
1129 if (p->state) { in atmel_hlcdc_plane_reset()
1130 state = drm_plane_state_to_atmel_hlcdc_plane_state(p->state); in atmel_hlcdc_plane_reset()
1132 if (state->base.fb) in atmel_hlcdc_plane_reset()
1133 drm_framebuffer_put(state->base.fb); in atmel_hlcdc_plane_reset()
1136 p->state = NULL; in atmel_hlcdc_plane_reset()
1143 dev_err(p->dev->dev, in atmel_hlcdc_plane_reset()
1147 __drm_atomic_helper_plane_reset(p, &state->base); in atmel_hlcdc_plane_reset()
1155 drm_plane_state_to_atmel_hlcdc_plane_state(p->state); in atmel_hlcdc_plane_atomic_duplicate_state()
1167 if (copy->base.fb) in atmel_hlcdc_plane_atomic_duplicate_state()
1168 drm_framebuffer_get(copy->base.fb); in atmel_hlcdc_plane_atomic_duplicate_state()
1170 return ©->base; in atmel_hlcdc_plane_atomic_duplicate_state()
1178 struct atmel_hlcdc_dc *dc = p->dev->dev_private; in atmel_hlcdc_plane_atomic_destroy_state()
1181 for (i = 0; i < ARRAY_SIZE(state->dscrs); i++) { in atmel_hlcdc_plane_atomic_destroy_state()
1182 dma_pool_free(dc->dscrpool, state->dscrs[i], in atmel_hlcdc_plane_atomic_destroy_state()
1183 state->dscrs[i]->self); in atmel_hlcdc_plane_atomic_destroy_state()
1186 if (s->fb) in atmel_hlcdc_plane_atomic_destroy_state()
1187 drm_framebuffer_put(s->fb); in atmel_hlcdc_plane_atomic_destroy_state()
1204 struct atmel_hlcdc_dc *dc = dev->dev_private; in atmel_hlcdc_plane_create()
1209 plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL); in atmel_hlcdc_plane_create()
1211 return -ENOMEM; in atmel_hlcdc_plane_create()
1213 atmel_hlcdc_layer_init(&plane->layer, desc, dc->hlcdc->regmap); in atmel_hlcdc_plane_create()
1215 if (desc->type == ATMEL_HLCDC_BASE_LAYER) in atmel_hlcdc_plane_create()
1217 else if (desc->type == ATMEL_HLCDC_CURSOR_LAYER) in atmel_hlcdc_plane_create()
1222 ret = drm_universal_plane_init(dev, &plane->base, 0, in atmel_hlcdc_plane_create()
1224 desc->formats->formats, in atmel_hlcdc_plane_create()
1225 desc->formats->nformats, in atmel_hlcdc_plane_create()
1230 drm_plane_helper_add(&plane->base, in atmel_hlcdc_plane_create()
1238 dc->layers[desc->id] = &plane->layer; in atmel_hlcdc_plane_create()
1245 struct atmel_hlcdc_dc *dc = dev->dev_private; in atmel_hlcdc_create_planes()
1246 const struct atmel_hlcdc_layer_desc *descs = dc->desc->layers; in atmel_hlcdc_create_planes()
1247 int nlayers = dc->desc->nlayers; in atmel_hlcdc_create_planes()
1250 dc->dscrpool = dmam_pool_create("atmel-hlcdc-dscr", dev->dev, in atmel_hlcdc_create_planes()
1253 if (!dc->dscrpool) in atmel_hlcdc_create_planes()
1254 return -ENOMEM; in atmel_hlcdc_create_planes()