1816 static void ddr3_init_2500(struct ast_device *ast, const u32 *ddr_table)  in ddr3_init_2500()  argument
1820 	ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]);  in ddr3_init_2500()
1821 	ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]);  in ddr3_init_2500()
1822 	ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]);  in ddr3_init_2500()
1823 	ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]);	     /* MODEREG4/6 */  in ddr3_init_2500()
1824 	ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]);	     /* MODEREG5 */  in ddr3_init_2500()
1825 	ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */  in ddr3_init_2500()
1826 	ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]);	     /* MODEREG1/3 */  in ddr3_init_2500()
1833 	ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]);  in ddr3_init_2500()
1834 	ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]);  in ddr3_init_2500()
1835 	ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]);  in ddr3_init_2500()
1836 	ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]);  in ddr3_init_2500()
1837 	ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]);  in ddr3_init_2500()
1838 	ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]);  in ddr3_init_2500()
1839 	ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]);  in ddr3_init_2500()
1840 	ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]);  in ddr3_init_2500()
1850 	ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]);  in ddr3_init_2500()
1854 	check_dram_size_2500(ast, ddr_table[REGIDX_RFC]);  in ddr3_init_2500()
1860 static void ddr4_init_2500(struct ast_device *ast, const u32 *ddr_table)  in ddr4_init_2500()  argument
1868 	ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]);  in ddr4_init_2500()
1869 	ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]);  in ddr4_init_2500()
1870 	ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]);  in ddr4_init_2500()
1871 	ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]);	     /* MODEREG4/6 */  in ddr4_init_2500()
1872 	ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]);	     /* MODEREG5 */  in ddr4_init_2500()
1873 	ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */  in ddr4_init_2500()
1874 	ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]);	     /* MODEREG1/3 */  in ddr4_init_2500()
1881 	ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]);  in ddr4_init_2500()
1882 	ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]);  in ddr4_init_2500()
1883 	ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]);  in ddr4_init_2500()
1884 	ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]);  in ddr4_init_2500()
1885 	ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]);  in ddr4_init_2500()
1886 	ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]);  in ddr4_init_2500()
1887 	ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]);  in ddr4_init_2500()
1888 	ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]);  in ddr4_init_2500()
1960 	ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]);  in ddr4_init_2500()
1964 	check_dram_size_2500(ast, ddr_table[REGIDX_RFC]);  in ddr4_init_2500()