Lines Matching +full:powered +full:- +full:remotely

2  * Copyright 2012-2023 Advanced Micro Devices, Inc.
108 // for example, 1080p -> 8K is 4.0, or 4000 raw value
116 // for example, 8K -> 1080p is 0.25, or 250 raw value
128 * DOC: color-management-caps
133 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
140 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
156 * struct dpp_color_caps - color pipeline capabilities for display pipe and
161 * just plain 256-entry lookup
170 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
171 * @dgam_rom_caps: pre-definied curve caps for degamma 1D LUT
172 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
192 * struct mpc_color_caps - color pipeline capabilities for multiple pipe and
201 * @ogam_rom_caps: pre-definied curve caps for regamma 1D LUT
213 * struct dc_color_caps - color pipes capabilities for DPP and MPC hw blocks
384 * re-programming however do not affect bandwidth consumption or clock
521 INGAME_FAMS_SINGLE_DISP_ENABLE, // enable in-game fams
522 INGAME_FAMS_DISABLE, // disable in-game fams
523 INGAME_FAMS_MULTI_DISP_ENABLE, //enable in-game fams for multi-display
524 …INGAME_FAMS_MULTI_DISP_CLAMPED_ONLY, //enable in-game fams for multi-display only for clamped RR s…
528 * enum pipe_split_policy - Pipe split strategy supported by DCN
536 * pipe in order to bring the best trade-off between performance and
568 DCN_PWR_STATE_UNKNOWN = -1,
583 * struct dc_clocks - DC pipe clocks
656 unsigned long long start_tick = dc->debug.bw_val_profile.enable ? \
657 dm_get_timestamp(dc->ctx) : 0
660 if (dc->debug.bw_val_profile.enable) \
661 dc->debug.bw_val_profile.total_count++
664 if (dc->debug.bw_val_profile.enable) { \
666 voltage_level_tick = dm_get_timestamp(dc->ctx); \
667 dc->debug.bw_val_profile.skip_ ## status ## _count++; \
671 if (dc->debug.bw_val_profile.enable) \
672 voltage_level_tick = dm_get_timestamp(dc->ctx)
675 if (dc->debug.bw_val_profile.enable) \
676 watermark_tick = dm_get_timestamp(dc->ctx)
679 if (dc->debug.bw_val_profile.enable) { \
680 end_tick = dm_get_timestamp(dc->ctx); \
681 dc->debug.bw_val_profile.total_ticks += end_tick - start_tick; \
682 dc->debug.bw_val_profile.voltage_level_ticks += voltage_level_tick - start_tick; \
684 dc->debug.bw_val_profile.watermark_ticks += watermark_tick - voltage_level_tick; \
685 dc->debug.bw_val_profile.rq_dlg_ticks += end_tick - watermark_tick; \
789 * 15-2: reserved
790 * 31-16: timeout in ms
863 * struct dc_debug_options - DC debug struct
973 /* TODO - remove once tested */
1528 * Color Transformations for pre-blend MCM (Shaper, 3DLUT, 1DLUT)
1560 * struct dc_validation_set - Struct to store surface/stream associations for validation
1641 * return - minimum required timing bandwidth in kbps.
1650 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
1723 * Pending allows link HWSS to differentiate PHY vs non-PHY pattern,
1727 * pending_test_pattern will be invalid or contain a non-PHY test pattern
1801 …bool link_powered_externally; // Used to bypass hardware sequencing delays when panel is powered d…
1842 * @reason - Indicate which event triggers this detection. dc may customize
1844 * return false - if detection is not fully completed. This could happen when
1847 * link->connection_type == dc_connection_mst_branch when returning false).
1848 * return true - detection is completed, link has been fully updated with latest
1860 * @dc_link - link the remote sink will be added to.
1861 * @edid - byte array of EDID raw data.
1862 * @len - size of the edid in byte
1863 * @init_data -
1872 * @link - link the sink should be removed from
1873 * @sink - sink to be removed.
1887 * @type - dc_connection_single if connected, dc_connection_none otherwise.
1888 * return - false if an unexpected error occurs, true otherwise.
1899 * return - true HPD is asserted (HPD high), false otherwise (HPD low)
1909 * @link - The link the HPD pin is associated with.
1910 * @enable = true - enable hardware HPD filter. HPD event will only queued to irq
1917 * @enable = false - disable hardware HPD filter. HPD event will be queued
1924 * @link_index - index to a link with ddc in i2c mode
1925 * @cmd - i2c command structure
1926 * return - true if success, false otherwise.
1934 * @link_index - index to a link with ddc in i2c mode
1935 * @cmd - i2c command structure
1936 * return - true if success, false otherwise.
1944 * retries or handle error states. The reply is returned in the payload->reply
1946 * transferred,or -1 on a failure.
1963 * TODO - When defer_handling is true the function will have a different purpose.
1968 * true - Downstream port status changed. DM should call DC to do the
1970 * false - no change in Downstream port status. No further action required
1985 * return true - hpd rx irq should be handled.
1986 * return false - it is safe to ignore hpd rx irq event
1991 * @link - link the hpd irq data associated with
1992 * @hpd_irq_dpcd_data - input hpd irq data
1993 * return - true if hpd irq data indicates a link lost
1999 * @link - link where the hpd irq data should be read from
2000 * @irq_data - output hpd irq data
2001 * return - DC_OK if hpd irq data is read successfully, otherwise hpd irq data
2011 * TODO - in the future we should consider to expand link resume interface to
2026 * return - total effective link bandwidth in kbps.
2044 * return - min hblank size in bytes, 0 if 8b/10b SST.
2084 * interface i.e stream_update->dsc_config
2092 * @link - current detected link
2093 * @req_bw - requested bandwidth in kbps
2094 * @link_settings - returned most optimal link settings that can fit the
2096 * return - false if link can't support requested bandwidth, true if link
2112 * @link - a link with DP RX connection
2113 * return - if stream is committed to this link with MST signal type, type of
2122 * @link - a link with DP RX connection
2123 * return - max dp link settings the link can enable.
2131 * @link - a link with DP RX connection
2132 * return - highest encoding format link supports.
2138 * @link - a link with dp connector signal type
2139 * return - true if connected, false otherwise
2143 /* Force DP lane settings update to main-link video signal and notify the change
2148 * @lt_settings - a container structure with desired hw_lane_settings
2155 * test or debugging purpose. The test pattern will remain until next un-plug.
2157 * @link - active link with DP signal output enabled.
2158 * @test_pattern - desired test pattern to output.
2160 * @test_pattern_color_space - for video test pattern choose a desired color
2162 * @p_link_settings - For PHY pattern choose a desired link settings
2163 * @p_custom_pattern - some test pattern will require a custom input to
2165 * @cust_pattern_size - size of the custom pattern input.
2190 * @link_settings - if not NULL, force preferred link settings to the link.
2191 * @lt_override - a set of override pointers. If any pointer is none NULL, dc
2203 /* return - true if FEC is supported with connected DP RX, false otherwise */
2208 * return - true if FEC should be enabled, false otherwise.
2219 * NOTE: this interface doesn't update dp main-link. Calling this function will
2220 * cause DP TX main-link and DP RX power states out of sync. DM has to restore
2223 * @on - true to set DP RX in D0 power state, false to set DP RX in D3 power
2228 /* Force link to read base dp receiver caps from dpcd 000h - 00Fh and overwrite
2229 * current value read from extended receiver cap from 02200h - 0220Fh.
2246 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
2292 * return - true if trace is initialized and has valid data. False dp trace
2313 * @in_detection - true to get link training end time stamp of last link
2321 * @in_detection - true to get link training count of last link
2335 * Send a request from DP-Tx requesting to allocate BW remotely after
2362 * Unplug => de-allocate bw
2385 /* Sink Interfaces - A sink corresponds to a display output device */
2390 // 8 byte port ID -> ELD.PortID
2392 // 128bit GUID in binary formufacturer name -> ELD.ManufacturerName
2394 // 2 byte product code -> ELD.ProductCode