654 amdgpu_lookup_format_info(u32 format, uint64_t modifier)  in amdgpu_lookup_format_info()  argument
656 	if (!IS_AMD_FMT_MOD(modifier))  in amdgpu_lookup_format_info()
659 	if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) < AMD_FMT_MOD_TILE_VER_GFX9 ||  in amdgpu_lookup_format_info()
660 	    AMD_FMT_MOD_GET(TILE_VERSION, modifier) >= AMD_FMT_MOD_TILE_VER_GFX12)  in amdgpu_lookup_format_info()
663 	if (AMD_FMT_MOD_GET(DCC_RETILE, modifier))  in amdgpu_lookup_format_info()
668 	if (AMD_FMT_MOD_GET(DCC, modifier))  in amdgpu_lookup_format_info()
729 	u64 modifier = 0;  in convert_tiling_flags_to_modifier_gfx12()  local
733 		modifier = DRM_FORMAT_MOD_LINEAR;  in convert_tiling_flags_to_modifier_gfx12()
738 		modifier =  in convert_tiling_flags_to_modifier_gfx12()
746 	afb->base.modifier = modifier;  in convert_tiling_flags_to_modifier_gfx12()
754 	uint64_t modifier = 0;  in convert_tiling_flags_to_modifier()  local
762 		modifier = DRM_FORMAT_MOD_LINEAR;  in convert_tiling_flags_to_modifier()
858 		modifier = AMD_FMT_MOD |  in convert_tiling_flags_to_modifier()
883 			modifier |= AMD_FMT_MOD_SET(DCC, 1) |  in convert_tiling_flags_to_modifier()
897 			 * but we should convert it to a modifier plane for getfb2, so the  in convert_tiling_flags_to_modifier()
908 				modifier |= AMD_FMT_MOD_SET(DCC_RETILE, 1);  in convert_tiling_flags_to_modifier()
922 					modifier |= AMD_FMT_MOD_SET(RB, rb) |  in convert_tiling_flags_to_modifier()
932 								modifier);  in convert_tiling_flags_to_modifier()
940 	afb->base.modifier = modifier;  in convert_tiling_flags_to_modifier()
978 static unsigned int get_dcc_block_size(uint64_t modifier, bool rb_aligned,  in get_dcc_block_size()  argument
981 	unsigned int ver = AMD_FMT_MOD_GET(TILE_VERSION, modifier);  in get_dcc_block_size()
990 		return max(10 + (rb_aligned ? (int)AMD_FMT_MOD_GET(RB, modifier) : 0), 12);  in get_dcc_block_size()
995 		int pipes_log2 = AMD_FMT_MOD_GET(PIPE_XOR_BITS, modifier);  in get_dcc_block_size()
998 		    AMD_FMT_MOD_GET(PACKERS, modifier) == pipes_log2)  in get_dcc_block_size()
1062 	uint64_t modifier = rfb->base.modifier;  in amdgpu_display_verify_sizes()  local
1070 		if (modifier == DRM_FORMAT_MOD_LINEAR) {  in amdgpu_display_verify_sizes()
1074 		} else if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) >= AMD_FMT_MOD_TILE_VER_GFX12) {  in amdgpu_display_verify_sizes()
1075 			int swizzle = AMD_FMT_MOD_GET(TILE, modifier);  in amdgpu_display_verify_sizes()
1099 			int swizzle = AMD_FMT_MOD_GET(TILE, modifier);  in amdgpu_display_verify_sizes()
1133 	if (AMD_FMT_MOD_GET(TILE_VERSION, modifier) <= AMD_FMT_MOD_TILE_VER_GFX11 &&  in amdgpu_display_verify_sizes()
1134 	    AMD_FMT_MOD_GET(DCC, modifier)) {  in amdgpu_display_verify_sizes()
1135 		if (AMD_FMT_MOD_GET(DCC_RETILE, modifier)) {  in amdgpu_display_verify_sizes()
1136 			block_size_log2 = get_dcc_block_size(modifier, false, false);  in amdgpu_display_verify_sizes()
1146 			block_size_log2 = get_dcc_block_size(modifier, true, true);  in amdgpu_display_verify_sizes()
1148 			bool pipe_aligned = AMD_FMT_MOD_GET(DCC_PIPE_ALIGN, modifier);  in amdgpu_display_verify_sizes()
1150 			block_size_log2 = get_dcc_block_size(modifier, true, pipe_aligned);  in amdgpu_display_verify_sizes()
1206 	/* Verify that the modifier is supported. */  in amdgpu_display_gem_fb_verify_and_init()
1208 				      mode_cmd->modifier[0])) {  in amdgpu_display_gem_fb_verify_and_init()
1210 			    "unsupported pixel format %p4cc / modifier 0x%llx\n",  in amdgpu_display_gem_fb_verify_and_init()
1211 			    &mode_cmd->pixel_format, mode_cmd->modifier[0]);  in amdgpu_display_gem_fb_verify_and_init()
1246 	 * This needs to happen before modifier conversion as that might change  in amdgpu_display_framebuffer_init()
1265 			      "GFX9+ requires FB check based on format modifier\n");  in amdgpu_display_framebuffer_init()
1279 			drm_dbg_kms(dev, "Failed to convert tiling flags 0x%llX to a modifier",  in amdgpu_display_framebuffer_init()