Lines Matching +full:socfpga +full:- +full:lwhps2fpga +full:- +full:bridge
1 // SPDX-License-Identifier: GPL-2.0
3 * FPGA to/from HPS Bridge Driver for Altera SoCFPGA Devices
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
9 * Signed-off-by: Anatolij Gustschin <[email protected]>
13 * This driver manages bridges on a Altera SOCFPGA between the ARM host
19 * reprogramming the FPGA and re-enabled after the FPGA has been programmed.
23 #include <linux/fpga/fpga-bridge.h>
39 #define LWHPS2FPGA_BRIDGE_NAME "lwhps2fpga"
50 static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge) in alt_hps2fpga_enable_show() argument
52 struct altera_hps2fpga_data *priv = bridge->priv; in alt_hps2fpga_enable_show()
54 return reset_control_status(priv->bridge_reset); in alt_hps2fpga_enable_show()
67 /* bring bridge out of reset */ in _alt_hps2fpga_enable_set()
69 ret = reset_control_deassert(priv->bridge_reset); in _alt_hps2fpga_enable_set()
71 ret = reset_control_assert(priv->bridge_reset); in _alt_hps2fpga_enable_set()
75 /* Allow bridge to be visible to L3 masters or not */ in _alt_hps2fpga_enable_set()
76 if (priv->remap_mask) { in _alt_hps2fpga_enable_set()
81 l3_remap_shadow |= priv->remap_mask; in _alt_hps2fpga_enable_set()
83 l3_remap_shadow &= ~priv->remap_mask; in _alt_hps2fpga_enable_set()
85 ret = regmap_write(priv->l3reg, ALT_L3_REMAP_OFST, in _alt_hps2fpga_enable_set()
93 static int alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable) in alt_hps2fpga_enable_set() argument
95 return _alt_hps2fpga_enable_set(bridge->priv, enable); in alt_hps2fpga_enable_set()
118 { .compatible = "altr,socfpga-hps2fpga-bridge",
120 { .compatible = "altr,socfpga-lwhps2fpga-bridge",
122 { .compatible = "altr,socfpga-fpga2hps-bridge",
129 struct device *dev = &pdev->dev; in alt_fpga_bridge_probe()
137 priv->bridge_reset = of_reset_control_get_exclusive_by_index(dev->of_node, in alt_fpga_bridge_probe()
139 if (IS_ERR(priv->bridge_reset)) { in alt_fpga_bridge_probe()
140 dev_err(dev, "Could not get %s reset control\n", priv->name); in alt_fpga_bridge_probe()
141 return PTR_ERR(priv->bridge_reset); in alt_fpga_bridge_probe()
144 if (priv->remap_mask) { in alt_fpga_bridge_probe()
145 priv->l3reg = syscon_regmap_lookup_by_compatible("altr,l3regs"); in alt_fpga_bridge_probe()
146 if (IS_ERR(priv->l3reg)) { in alt_fpga_bridge_probe()
148 return PTR_ERR(priv->l3reg); in alt_fpga_bridge_probe()
152 priv->clk = devm_clk_get(dev, NULL); in alt_fpga_bridge_probe()
153 if (IS_ERR(priv->clk)) { in alt_fpga_bridge_probe()
155 return PTR_ERR(priv->clk); in alt_fpga_bridge_probe()
158 ret = clk_prepare_enable(priv->clk); in alt_fpga_bridge_probe()
161 return -EBUSY; in alt_fpga_bridge_probe()
164 if (!of_property_read_u32(dev->of_node, "bridge-enable", &enable)) { in alt_fpga_bridge_probe()
166 dev_warn(dev, "invalid bridge-enable %u > 1\n", enable); in alt_fpga_bridge_probe()
168 dev_info(dev, "%s bridge\n", in alt_fpga_bridge_probe()
177 br = fpga_bridge_register(dev, priv->name, in alt_fpga_bridge_probe()
189 clk_disable_unprepare(priv->clk); in alt_fpga_bridge_probe()
196 struct fpga_bridge *bridge = platform_get_drvdata(pdev); in alt_fpga_bridge_remove() local
197 struct altera_hps2fpga_data *priv = bridge->priv; in alt_fpga_bridge_remove()
199 fpga_bridge_unregister(bridge); in alt_fpga_bridge_remove()
201 clk_disable_unprepare(priv->clk); in alt_fpga_bridge_remove()
217 MODULE_DESCRIPTION("Altera SoCFPGA HPS to FPGA Bridge");