120 #define CH_HASH_MASK_LSB	6
121 #define SLICE_HASH_MASK_LSB	6
207 		pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,  in apl_rd_reg()
733 #define R(n) (BIT(6) | (n))	/* row */
761 			C(2),  C(3),  C(4),  C(5),  C(6),  B(0),  B(1),  B(2),  R(0),
762 			R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),  R(9),
771 			C(2),  C(3),  C(4),  C(5),  C(6),  B(0),  B(1),  B(2),  R(0),
772 			R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),  R(9),
781 			C(2),  C(3),  C(4),  C(5),  C(6),  B(0),  B(1),  B(2),  R(0),
782 			R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),  R(9),
791 			C(2),  C(3),  C(4),  C(5),  C(6),  B(0),  B(1),  B(2),  R(0),
792 			R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),  R(9),
801 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  B(0),  B(1),  B(2),
802 			R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),
811 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  B(0),  B(1),  B(2),
812 			R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),
821 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  B(0),  B(1),  B(2),
822 			R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),
831 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  B(0),  B(1),  B(2),
832 			R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),  R(8),
841 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  C(8),  B(0),  B(1),
842 			B(2),  R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),
851 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  C(8),  B(0),  B(1),
852 			B(2),  R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),
861 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  C(8),  B(0),  B(1),
862 			B(2),  R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),
871 			C(2),  C(3),  C(4),  C(5),  C(6),  C(7),  C(8),  B(0),  B(1),
872 			B(2),  R(0),  R(1),  R(2),  R(3),  R(4),  R(5),  R(6),  R(7),
911 	struct dimm_geometry *d = &dimms[g];  in apl_pmi2mem()  local
923 		type = d->bits[i + skiprs] & ~0xf;  in apl_pmi2mem()
924 		idx = d->bits[i + skiprs] & 0xf;  in apl_pmi2mem()
932 			type = d->bits[i + skiprs] & ~0xf;  in apl_pmi2mem()
933 			idx = d->bits[i + skiprs] & 0xf;  in apl_pmi2mem()
943 				bank ^= bank_hash(pmiaddr, idx, d->addrdec);  in apl_pmi2mem()
989 	daddr->bank = dnv_get_bit(pmiaddr, dmap[pmiidx].ba0 + 6, 0);  in dnv_pmi2mem()
990 	daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].ba1 + 6, 1);  in dnv_pmi2mem()
991 	daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg0 + 6, 2);  in dnv_pmi2mem()
993 		daddr->bank |= dnv_get_bit(pmiaddr, dmap[pmiidx].bg1 + 6, 3);  in dnv_pmi2mem()
996 			daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 0);  in dnv_pmi2mem()
997 			daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 1);  in dnv_pmi2mem()
1000 				daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2);  in dnv_pmi2mem()
1003 				daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2);  in dnv_pmi2mem()
1004 			daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 3);  in dnv_pmi2mem()
1006 			daddr->bank ^= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 0);  in dnv_pmi2mem()
1007 			daddr->bank ^= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 1);  in dnv_pmi2mem()
1009 				daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 2);  in dnv_pmi2mem()
1011 				daddr->bank ^= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 2);  in dnv_pmi2mem()
1015 	daddr->row = dnv_get_bit(pmiaddr, dmap2[pmiidx].row0 + 6, 0);  in dnv_pmi2mem()
1016 	daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row1 + 6, 1);  in dnv_pmi2mem()
1017 	daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row2 + 6, 2);  in dnv_pmi2mem()
1018 	daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row3 + 6, 3);  in dnv_pmi2mem()
1019 	daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row4 + 6, 4);  in dnv_pmi2mem()
1020 	daddr->row |= dnv_get_bit(pmiaddr, dmap2[pmiidx].row5 + 6, 5);  in dnv_pmi2mem()
1021 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row6 + 6, 6);  in dnv_pmi2mem()
1022 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row7 + 6, 7);  in dnv_pmi2mem()
1023 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row8 + 6, 8);  in dnv_pmi2mem()
1024 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row9 + 6, 9);  in dnv_pmi2mem()
1025 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row10 + 6, 10);  in dnv_pmi2mem()
1026 	daddr->row |= dnv_get_bit(pmiaddr, dmap3[pmiidx].row11 + 6, 11);  in dnv_pmi2mem()
1027 	daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row12 + 6, 12);  in dnv_pmi2mem()
1028 	daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row13 + 6, 13);  in dnv_pmi2mem()
1030 		daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row14 + 6, 14);  in dnv_pmi2mem()
1032 		daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row15 + 6, 15);  in dnv_pmi2mem()
1034 		daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row16 + 6, 16);  in dnv_pmi2mem()
1036 		daddr->row |= dnv_get_bit(pmiaddr, dmap4[pmiidx].row17 + 6, 17);  in dnv_pmi2mem()
1038 	daddr->col = dnv_get_bit(pmiaddr, dmap5[pmiidx].ca3 + 6, 3);  in dnv_pmi2mem()
1039 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca4 + 6, 4);  in dnv_pmi2mem()
1040 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca5 + 6, 5);  in dnv_pmi2mem()
1041 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca6 + 6, 6);  in dnv_pmi2mem()
1042 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca7 + 6, 7);  in dnv_pmi2mem()
1043 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca8 + 6, 8);  in dnv_pmi2mem()
1044 	daddr->col |= dnv_get_bit(pmiaddr, dmap5[pmiidx].ca9 + 6, 9);  in dnv_pmi2mem()
1054 		pnd2_printk(KERN_INFO, "Unsupported DIMM in channel %d\n", ch);  in check_channel()
1057 		pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch);  in check_channel()
1074 #define DIMMS_PRESENT(d) ((d)->rken0 + (d)->rken1 + (d)->rken2 + (d)->rken3)  argument
1078 	struct d_cr_drp *d = &drp[ch];  in check_unit()  local
1080 	if (DIMMS_PRESENT(d) && !ecc_ctrl[ch].eccen) {  in check_unit()
1081 		pnd2_printk(KERN_INFO, "ECC disabled on channel %d\n", ch);  in check_unit()
1116 	edac_dbg(0, "SysAddr=%llx PmiAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n",  in get_memory_error_data()
1134 	u32 optypenum = GET_BITFIELD(m->status, 4, 6);  in pnd2_mce_output_error()
1185 		 "%s%s err_code:%04x:%04x channel:%d DIMM:%d rank:%d row:%d bank:%d col:%d",  in pnd2_mce_output_error()
1205 	struct d_cr_drp0 *d;  in apl_get_dimm_config()  local
1212 			edac_dbg(0, "No allocated DIMM for channel %d\n", i);  in apl_get_dimm_config()
1216 		d = &drp0[i];  in apl_get_dimm_config()
1218 			if (dimms[g].addrdec == d->addrdec &&  in apl_get_dimm_config()
1219 			    dimms[g].dden == d->dden &&  in apl_get_dimm_config()
1220 			    dimms[g].dwid == d->dwid)  in apl_get_dimm_config()
1224 			edac_dbg(0, "Channel %d: unrecognized DIMM\n", i);  in apl_get_dimm_config()
1229 		capacity = (d->rken0 + d->rken1) * 8 * BIT(dimms[g].rowbits + dimms[g].colbits);  in apl_get_dimm_config()
1230 		edac_dbg(0, "Channel %d: %lld MByte DIMM\n", i, capacity >> (20 - 3));  in apl_get_dimm_config()
1233 		dimm->dtype = (d->dwid == 0) ? DEV_X8 : DEV_X16;  in apl_get_dimm_config()
1236 		snprintf(dimm->label, sizeof(dimm->label), "Slice#%d_Chan#%d", i / 2, i % 2);  in apl_get_dimm_config()
1248 	struct d_cr_drp *d;  in dnv_get_dimm_config()  local
1279 		d = &drp[i];  in dnv_get_dimm_config()
1281 		ranks_of_dimm[0] = d->rken0 + d->rken1;  in dnv_get_dimm_config()
1283 		ranks_of_dimm[1] = d->rken2 + d->rken3;  in dnv_get_dimm_config()
1291 				edac_dbg(0, "No allocated DIMM for channel %d DIMM %d\n", i, j);  in dnv_get_dimm_config()
1296 			edac_dbg(0, "Channel %d DIMM %d: %lld MByte DIMM\n", i, j, capacity >> (20 - 3));  in dnv_get_dimm_config()
1299 			dimm->dtype = dnv_dtypes[j ? d->dimmdwid0 : d->dimmdwid1];  in dnv_get_dimm_config()
1302 			snprintf(dimm->label, sizeof(dimm->label), "Chan#%d_DIMM#%d", i, j);  in dnv_get_dimm_config()
1439 			 "SysAddr=%llx Channel=%d DIMM=%d Rank=%d Bank=%d Row=%d Column=%d\n",  in debugfs_u64_set()
1555 		pnd2_printk(KERN_ERR, "Failed to register device with error %d.\n", rc);  in pnd2_init()