1 // SPDX-License-Identifier: GPL-2.0-only
37 static const char * const tt_msgs[] = { "INSN", "DATA", "GEN", "RESV" };
40 static const char * const ll_msgs[] = { "RESV", "L1", "L2", "L3/GEN" };
44        "GEN", "RD", "WR", "DRD", "DWR", "IRD", "PRF", "EV", "SNP"
48 const char * const pp_msgs[] = { "SRC", "RES", "OBS", "GEN" };
55 static const char * const ii_msgs[] = { "MEM", "RESV", "IO", "GEN" };
71 	"PFB non-cacheable bit parity error",
101 	"Link-defined sync error packets detected on HT link",
290 	u16 ec = EC(m->status);  in decode_mc0_mce()
291 	u8 xec = XEC(m->status, xec_mask);  in decode_mc0_mce()
381 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-2]);  in f15h_mc1_mce()
385 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
389 		pr_cont("Decoder %s parity error.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
400 	u16 ec = EC(m->status);  in decode_mc1_mce()
401 	u8 xec = XEC(m->status, xec_mask);  in decode_mc1_mce()
409 		bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58)));  in decode_mc1_mce()
483 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x4]);  in f15h_mc2_mce()
487 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x7]);  in f15h_mc2_mce()
546 	u16 ec = EC(m->status);  in decode_mc2_mce()
547 	u8 xec = XEC(m->status, xec_mask);  in decode_mc2_mce()
557 	u16 ec = EC(m->status);  in decode_mc3_mce()
558 	u8 xec = XEC(m->status, xec_mask);  in decode_mc3_mce()
586 	unsigned int fam = x86_family(m->cpuid);  in decode_mc4_mce()
587 	int node_id = topology_amd_node_id(m->extcpu);  in decode_mc4_mce()
588 	u16 ec = EC(m->status);  in decode_mc4_mce()
589 	u8 xec = XEC(m->status, 0x1f);  in decode_mc4_mce()
635 	pr_cont("%s.\n", mc4_mce_desc[xec - offset]);  in decode_mc4_mce()
644 	unsigned int fam = x86_family(m->cpuid);  in decode_mc5_mce()
645 	u16 ec = EC(m->status);  in decode_mc5_mce()
646 	u8 xec = XEC(m->status, xec_mask);  in decode_mc5_mce()
676 	u8 xec = XEC(m->status, xec_mask);  in decode_mc6_mce()
712 	[SMCA_XGMI_PCS]			= "Ext Global Memory Interconnect PCS Unit",
718 	[SMCA_XGMI_PHY]			= "Ext Global Memory Interconnect PHY Unit",
734 	enum smca_bank_types bank_type = smca_get_bank_type(m->extcpu, m->bank);  in decode_smca_error()
735 	u8 xec = XEC(m->status, xec_mask);  in decode_smca_error()
741 		pr_emerg(HW_ERR "Bank %d is reserved.\n", m->bank);  in decode_smca_error()
745 	pr_emerg(HW_ERR "%s Ext. Error Code: %d", smca_get_long_name(bank_type), xec);  in decode_smca_error()
749 		decode_dram_ecc(topology_amd_node_id(m->extcpu), m);  in decode_smca_error()
767 		pr_cont(", mem-tx: %s", R4_MSG(ec));  in amd_decode_err_code()
770 			pr_cont(", part-proc: %s (%s)", PP_MSG(ec), TO_MSG(ec));  in amd_decode_err_code()
778 	if (m->status & MCI_STATUS_UC) {  in decode_error_status()
779 		if (m->status & MCI_STATUS_PCC)  in decode_error_status()
781 		if (m->mcgstatus & MCG_STATUS_RIPV)  in decode_error_status()
786 	if (m->status & MCI_STATUS_DEFERRED)  in decode_error_status()
797 	unsigned int fam = x86_family(m->cpuid);  in amd_decode_mce()
801 	if (m->kflags & MCE_HANDLED_CEC)  in amd_decode_mce()
807 		m->extcpu,  in amd_decode_mce()
808 		fam, x86_model(m->cpuid), x86_stepping(m->cpuid),  in amd_decode_mce()
809 		m->bank,  in amd_decode_mce()
810 		((m->status & MCI_STATUS_OVER)	? "Over"  : "-"),  in amd_decode_mce()
811 		((m->status & MCI_STATUS_UC)	? "UE"	  :  in amd_decode_mce()
812 		 (m->status & MCI_STATUS_DEFERRED) ? "-"  : "CE"),  in amd_decode_mce()
813 		((m->status & MCI_STATUS_MISCV)	? "MiscV" : "-"),  in amd_decode_mce()
814 		((m->status & MCI_STATUS_ADDRV)	? "AddrV" : "-"),  in amd_decode_mce()
815 		((m->status & MCI_STATUS_PCC)	? "PCC"	  : "-"));  in amd_decode_mce()
818 		rdmsr_safe(MSR_AMD64_SMCA_MCx_CONFIG(m->bank), &mca_config_lo, &dummy);  in amd_decode_mce()
821 			pr_cont("|%s", ((m->status & MCI_STATUS_TCC) ? "TCC" : "-"));  in amd_decode_mce()
823 		pr_cont("|%s", ((m->status & MCI_STATUS_SYNDV) ? "SyndV" : "-"));  in amd_decode_mce()
827 	ecc = (m->status >> 45) & 0x3;  in amd_decode_mce()
832 		pr_cont("|%s", (m->status & MCI_STATUS_DEFERRED ? "Deferred" : "-"));  in amd_decode_mce()
835 		if (fam != 0x15 || m->bank != 4)  in amd_decode_mce()
836 			pr_cont("|%s", (m->status & MCI_STATUS_POISON ? "Poison" : "-"));  in amd_decode_mce()
840 		pr_cont("|%s", (m->status & MCI_STATUS_SCRUB ? "Scrub" : "-"));  in amd_decode_mce()
842 	pr_cont("]: 0x%016llx\n", m->status);  in amd_decode_mce()
844 	if (m->status & MCI_STATUS_ADDRV)  in amd_decode_mce()
845 		pr_emerg(HW_ERR "Error Addr: 0x%016llx\n", m->addr);  in amd_decode_mce()
847 	if (m->ppin)  in amd_decode_mce()
848 		pr_emerg(HW_ERR "PPIN: 0x%016llx\n", m->ppin);  in amd_decode_mce()
851 		pr_emerg(HW_ERR "IPID: 0x%016llx", m->ipid);  in amd_decode_mce()
853 		if (m->status & MCI_STATUS_SYNDV) {  in amd_decode_mce()
854 			pr_cont(", Syndrome: 0x%016llx\n", m->synd);  in amd_decode_mce()
859 				memcpy(&frutext[0], &err->vendor.amd.synd1, 8);  in amd_decode_mce()
860 				memcpy(&frutext[8], &err->vendor.amd.synd2, 8);  in amd_decode_mce()
872 	if (m->tsc)  in amd_decode_mce()
873 		pr_emerg(HW_ERR "TSC: %llu\n", m->tsc);  in amd_decode_mce()
879 	switch (m->bank) {  in amd_decode_mce()
913 	amd_decode_err_code(m->status & 0xffff);  in amd_decode_mce()
915 	m->kflags |= MCE_HANDLED_EDAC;  in amd_decode_mce()
928 	if (c->x86_vendor != X86_VENDOR_AMD &&  in mce_amd_init()
929 	    c->x86_vendor != X86_VENDOR_HYGON)  in mce_amd_init()
930 		return -ENODEV;  in mce_amd_init()
933 		return -ENODEV;  in mce_amd_init()
940 	switch (c->x86) {  in mce_amd_init()
972 		xec_mask = c->x86_model == 0x60 ? 0x3f : 0x1f;  in mce_amd_init()
989 		return -EINVAL;  in mce_amd_init()
992 		printk(KERN_WARNING "Huh? What family is it: 0x%x?!\n", c->x86);  in mce_amd_init()
993 		return -EINVAL;  in mce_amd_init()
997 	pr_info("MCE: In-kernel MCE decoding enabled.\n");  in mce_amd_init()
1012 MODULE_ALIAS("edac-mce-amd");