11 static u8 xec_mask	 = 0xf;
72 	"PFB valid bit parity error",			/* xec = 0xd */
73 	"Microcode Patch Buffer",			/* xec = 010 */
82 	"Fill ECC error on data fills",			/* xec = 0x4 */
91 	"L2 Tag ECC error",				/* xec = 0x10 */
114 	"L3 data cache ECC error",			/* xec = 0x1c */
146 static bool f12h_mc0_mce(u16 ec, u8 xec)  in f12h_mc0_mce()  argument
164 static bool f10h_mc0_mce(u16 ec, u8 xec)  in f10h_mc0_mce()  argument
170 	return f12h_mc0_mce(ec, xec);  in f10h_mc0_mce()
173 static bool k8_mc0_mce(u16 ec, u8 xec)  in k8_mc0_mce()  argument
180 	return f10h_mc0_mce(ec, xec);  in k8_mc0_mce()
183 static bool cat_mc0_mce(u16 ec, u8 xec)  in cat_mc0_mce()  argument
235 static bool f15h_mc0_mce(u16 ec, u8 xec)  in f15h_mc0_mce()  argument
241 		switch (xec) {  in f15h_mc0_mce()
242 		case 0x0:  in f15h_mc0_mce()
246 		case 0x1:  in f15h_mc0_mce()
250 		case 0x2:  in f15h_mc0_mce()
251 		case 0x11:  in f15h_mc0_mce()
255 		case 0x3:  in f15h_mc0_mce()
259 		case 0x10:  in f15h_mc0_mce()
263 		case 0x12:  in f15h_mc0_mce()
272 		if (!xec)  in f15h_mc0_mce()
275 			pr_cont(" Internal error condition type %d.\n", xec);  in f15h_mc0_mce()
277 		if (xec <= 0x1f)  in f15h_mc0_mce()
291 	u8 xec = XEC(m->status, xec_mask);  in decode_mc0_mce()  local
299 				((xec == 2) ? "locked miss"  in decode_mc0_mce()
300 					    : (xec ? "multimatch" : "parity")));  in decode_mc0_mce()
303 	} else if (fam_ops.mc0_mce(ec, xec))  in decode_mc0_mce()
309 static bool k8_mc1_mce(u16 ec, u8 xec)  in k8_mc1_mce()  argument
317 	if (ll == 0x2)  in k8_mc1_mce()
319 	else if (ll == 0x1) {  in k8_mc1_mce()
343 static bool cat_mc1_mce(u16 ec, u8 xec)  in cat_mc1_mce()  argument
358 	else if (xec == 0x0)  in cat_mc1_mce()
360 	else if (xec == 0x2)  in cat_mc1_mce()
368 static bool f15h_mc1_mce(u16 ec, u8 xec)  in f15h_mc1_mce()  argument
375 	switch (xec) {  in f15h_mc1_mce()
376 	case 0x0 ... 0xa:  in f15h_mc1_mce()
377 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec]);  in f15h_mc1_mce()
380 	case 0xd:  in f15h_mc1_mce()
381 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-2]);  in f15h_mc1_mce()
384 	case 0x10:  in f15h_mc1_mce()
385 		pr_cont("%s.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
388 	case 0x11 ... 0x15:  in f15h_mc1_mce()
389 		pr_cont("Decoder %s parity error.\n", f15h_mc1_mce_desc[xec-4]);  in f15h_mc1_mce()
401 	u8 xec = XEC(m->status, xec_mask);  in decode_mc1_mce()  local
407 			(xec ? "multimatch" : "parity error"));  in decode_mc1_mce()
409 		bool k8 = (boot_cpu_data.x86 == 0xf && (m->status & BIT_64(58)));  in decode_mc1_mce()
413 		if (xec <= 0x3f)  in decode_mc1_mce()
417 	} else if (fam_ops.mc1_mce(ec, xec))  in decode_mc1_mce()
428 static bool k8_mc2_mce(u16 ec, u8 xec)  in k8_mc2_mce()  argument
432 	if (xec == 0x1)  in k8_mc2_mce()
434 	else if (xec == 0x3)  in k8_mc2_mce()
436 	else if (xec == 0x2 && MEM_ERROR(ec))  in k8_mc2_mce()
438 	else if (xec == 0x0) {  in k8_mc2_mce()
448 			if (r4 >= 0x7)  in k8_mc2_mce()
451 			else if (r4 <= 0x1)  in k8_mc2_mce()
464 static bool f15h_mc2_mce(u16 ec, u8 xec)  in f15h_mc2_mce()  argument
469 		if (xec == 0x0)  in f15h_mc2_mce()
471 		else if (xec == 0x1)  in f15h_mc2_mce()
476 		if (xec > 2)  in f15h_mc2_mce()
481 		switch (xec) {  in f15h_mc2_mce()
482 		case 0x4 ... 0xc:  in f15h_mc2_mce()
483 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x4]);  in f15h_mc2_mce()
486 		case 0x10 ... 0x14:  in f15h_mc2_mce()
487 			pr_cont("%s.\n", f15h_mc2_mce_desc[xec - 0x7]);  in f15h_mc2_mce()
494 		if (xec <= 0x3f)  in f15h_mc2_mce()
503 static bool f16h_mc2_mce(u16 ec, u8 xec)  in f16h_mc2_mce()  argument
510 	switch (xec) {  in f16h_mc2_mce()
511 	case 0x04 ... 0x05:  in f16h_mc2_mce()
515 	case 0x09 ... 0x0b:  in f16h_mc2_mce()
516 	case 0x0d ... 0x0f:  in f16h_mc2_mce()
522 	case 0x10 ... 0x19:  in f16h_mc2_mce()
523 	case 0x1b:  in f16h_mc2_mce()
525 			(((r4 == R4_RD) && !(xec & 0x3)) ? "Hit"  :  in f16h_mc2_mce()
530 	case 0x1c ... 0x1d:  in f16h_mc2_mce()
531 	case 0x1f:  in f16h_mc2_mce()
547 	u8 xec = XEC(m->status, xec_mask);  in decode_mc2_mce()  local
551 	if (!fam_ops.mc2_mce(ec, xec))  in decode_mc2_mce()
558 	u8 xec = XEC(m->status, xec_mask);  in decode_mc3_mce()  local
560 	if (boot_cpu_data.x86 >= 0x14) {  in decode_mc3_mce()
568 	if (xec == 0x0) {  in decode_mc3_mce()
589 	u8 xec = XEC(m->status, 0x1f);  in decode_mc4_mce()  local
590 	u8 offset = 0;  in decode_mc4_mce()
594 	switch (xec) {  in decode_mc4_mce()
595 	case 0x0 ... 0xe:  in decode_mc4_mce()
598 		if (xec == 0x0 || xec == 0x8) {  in decode_mc4_mce()
600 			if (fam == 0x11)  in decode_mc4_mce()
603 			pr_cont("%s.\n", mc4_mce_desc[xec]);  in decode_mc4_mce()
611 	case 0xf:  in decode_mc4_mce()
620 	case 0x19:  in decode_mc4_mce()
621 		if (fam == 0x15 || fam == 0x16)  in decode_mc4_mce()
627 	case 0x1c ... 0x1f:  in decode_mc4_mce()
635 	pr_cont("%s.\n", mc4_mce_desc[xec - offset]);  in decode_mc4_mce()
646 	u8 xec = XEC(m->status, xec_mask);  in decode_mc5_mce()  local
648 	if (fam == 0xf || fam == 0x11)  in decode_mc5_mce()
654 		if (xec <= 0x1f) {  in decode_mc5_mce()
661 	if (xec == 0x0 || xec == 0xc)  in decode_mc5_mce()
662 		pr_cont("%s.\n", mc5_mce_desc[xec]);  in decode_mc5_mce()
663 	else if (xec <= 0xd)  in decode_mc5_mce()
664 		pr_cont("%s parity error.\n", mc5_mce_desc[xec]);  in decode_mc5_mce()
676 	u8 xec = XEC(m->status, xec_mask);  in decode_mc6_mce()  local
680 	if (xec > 0x5)  in decode_mc6_mce()
683 	pr_cont("%s parity error.\n", mc6_mce_desc[xec]);  in decode_mc6_mce()
735 	u8 xec = XEC(m->status, xec_mask);  in decode_smca_error()  local
745 	pr_emerg(HW_ERR "%s Ext. Error Code: %d", smca_get_long_name(bank_type), xec);  in decode_smca_error()
748 	    xec == 0 && decode_dram_ecc)  in decode_smca_error()
798 	u32 mca_config_lo = 0, dummy;  in amd_decode_mce()
827 	ecc = (m->status >> 45) & 0x3;  in amd_decode_mce()
831 	if (fam >= 0x15) {  in amd_decode_mce()
835 		if (fam != 0x15 || m->bank != 4)  in amd_decode_mce()
839 	if (fam >= 0x17)  in amd_decode_mce()
842 	pr_cont("]: 0x%016llx\n", m->status);  in amd_decode_mce()
845 		pr_emerg(HW_ERR "Error Addr: 0x%016llx\n", m->addr);  in amd_decode_mce()
848 		pr_emerg(HW_ERR "PPIN: 0x%016llx\n", m->ppin);  in amd_decode_mce()
851 		pr_emerg(HW_ERR "IPID: 0x%016llx", m->ipid);  in amd_decode_mce()
854 			pr_cont(", Syndrome: 0x%016llx\n", m->synd);  in amd_decode_mce()
858 				frutext[16] = '\0';  in amd_decode_mce()
859 				memcpy(&frutext[0], &err->vendor.amd.synd1, 8);  in amd_decode_mce()
880 	case 0:  in amd_decode_mce()
913 	amd_decode_err_code(m->status & 0xffff);  in amd_decode_mce()
936 		xec_mask = 0x3f;  in mce_amd_init()
941 	case 0xf:  in mce_amd_init()
947 	case 0x10:  in mce_amd_init()
953 	case 0x11:  in mce_amd_init()
959 	case 0x12:  in mce_amd_init()
965 	case 0x14:  in mce_amd_init()
971 	case 0x15:  in mce_amd_init()
972 		xec_mask = c->x86_model == 0x60 ? 0x3f : 0x1f;  in mce_amd_init()
979 	case 0x16:  in mce_amd_init()
980 		xec_mask = 0x1f;  in mce_amd_init()
986 	case 0x17:  in mce_amd_init()
987 	case 0x18:  in mce_amd_init()
992 		printk(KERN_WARNING "Huh? What family is it: 0x%x?!\n", c->x86);  in mce_amd_init()
1001 	return 0;  in mce_amd_init()