Lines Matching full:dmacr
2547 u32 dmacr; in xilinx_vdma_channel_set_config() local
2552 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2561 dmacr &= ~XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2563 dmacr |= XILINX_DMA_DMACR_GENLOCK_EN; in xilinx_vdma_channel_set_config()
2564 dmacr &= ~XILINX_DMA_DMACR_MASTER_MASK; in xilinx_vdma_channel_set_config()
2565 dmacr |= cfg->master << XILINX_DMA_DMACR_MASTER_SHIFT; in xilinx_vdma_channel_set_config()
2580 dmacr &= ~XILINX_DMA_DMACR_FRAME_COUNT_MASK; in xilinx_vdma_channel_set_config()
2581 dmacr |= cfg->coalesc << XILINX_DMA_DMACR_FRAME_COUNT_SHIFT; in xilinx_vdma_channel_set_config()
2586 dmacr &= ~XILINX_DMA_DMACR_DELAY_MASK; in xilinx_vdma_channel_set_config()
2587 dmacr |= cfg->delay << XILINX_DMA_DMACR_DELAY_SHIFT; in xilinx_vdma_channel_set_config()
2592 dmacr &= ~XILINX_DMA_DMACR_FSYNCSRC_MASK; in xilinx_vdma_channel_set_config()
2593 dmacr |= cfg->ext_fsync << XILINX_DMA_DMACR_FSYNCSRC_SHIFT; in xilinx_vdma_channel_set_config()
2595 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, dmacr); in xilinx_vdma_channel_set_config()