Lines Matching +full:sub +full:- +full:engines
1 /* SPDX-License-Identifier: GPL-2.0 */
359 u64 engines; member
365 /* bytes 0-3 */
369 /* bytes 4-7 */
373 /* bytes 8-11 */
384 /* bytes 12-15 */
389 /* bytes 16-19 */
394 /* bytes 20-23 */
399 /* bytes 24-27 */
406 /* bytes 28-31 */
409 /* bytes 32-63 */
423 * idxd - struct idxd *
424 * n - wq id
425 * ofs - the index of the 32b dword for the config register
434 (__idxd_dev)->wqcfg_offset + (n) * (__idxd_dev)->wqcfg_size + sizeof(u32) * (ofs); \
437 #define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
444 * idxd - struct idxd *
445 * n - group id
446 * ofs - the index of the 64b qword for the config register
448 * The GRPCFG register block is divided into three sub-registers, which
450 * to the register block that contains the three sub-registers.
454 #define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
456 #define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)
457 #define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)