Lines Matching full:wq
18 static void idxd_wq_disable_cleanup(struct idxd_wq *wq);
41 static void free_hw_descs(struct idxd_wq *wq) in free_hw_descs() argument
45 for (i = 0; i < wq->num_descs; i++) in free_hw_descs()
46 kfree(wq->hw_descs[i]); in free_hw_descs()
48 kfree(wq->hw_descs); in free_hw_descs()
51 static int alloc_hw_descs(struct idxd_wq *wq, int num) in alloc_hw_descs() argument
53 struct device *dev = &wq->idxd->pdev->dev; in alloc_hw_descs()
57 wq->hw_descs = kcalloc_node(num, sizeof(struct dsa_hw_desc *), in alloc_hw_descs()
59 if (!wq->hw_descs) in alloc_hw_descs()
63 wq->hw_descs[i] = kzalloc_node(sizeof(*wq->hw_descs[i]), in alloc_hw_descs()
65 if (!wq->hw_descs[i]) { in alloc_hw_descs()
66 free_hw_descs(wq); in alloc_hw_descs()
74 static void free_descs(struct idxd_wq *wq) in free_descs() argument
78 for (i = 0; i < wq->num_descs; i++) in free_descs()
79 kfree(wq->descs[i]); in free_descs()
81 kfree(wq->descs); in free_descs()
84 static int alloc_descs(struct idxd_wq *wq, int num) in alloc_descs() argument
86 struct device *dev = &wq->idxd->pdev->dev; in alloc_descs()
90 wq->descs = kcalloc_node(num, sizeof(struct idxd_desc *), in alloc_descs()
92 if (!wq->descs) in alloc_descs()
96 wq->descs[i] = kzalloc_node(sizeof(*wq->descs[i]), in alloc_descs()
98 if (!wq->descs[i]) { in alloc_descs()
99 free_descs(wq); in alloc_descs()
107 /* WQ control bits */
108 int idxd_wq_alloc_resources(struct idxd_wq *wq) in idxd_wq_alloc_resources() argument
110 struct idxd_device *idxd = wq->idxd; in idxd_wq_alloc_resources()
114 if (wq->type != IDXD_WQT_KERNEL) in idxd_wq_alloc_resources()
117 num_descs = wq_dedicated(wq) ? wq->size : wq->threshold; in idxd_wq_alloc_resources()
118 wq->num_descs = num_descs; in idxd_wq_alloc_resources()
120 rc = alloc_hw_descs(wq, num_descs); in idxd_wq_alloc_resources()
124 wq->compls_size = num_descs * idxd->data->compl_size; in idxd_wq_alloc_resources()
125 wq->compls = dma_alloc_coherent(dev, wq->compls_size, &wq->compls_addr, GFP_KERNEL); in idxd_wq_alloc_resources()
126 if (!wq->compls) { in idxd_wq_alloc_resources()
131 rc = alloc_descs(wq, num_descs); in idxd_wq_alloc_resources()
135 rc = sbitmap_queue_init_node(&wq->sbq, num_descs, -1, false, GFP_KERNEL, in idxd_wq_alloc_resources()
141 struct idxd_desc *desc = wq->descs[i]; in idxd_wq_alloc_resources()
143 desc->hw = wq->hw_descs[i]; in idxd_wq_alloc_resources()
145 desc->completion = &wq->compls[i]; in idxd_wq_alloc_resources()
147 desc->iax_completion = &wq->iax_compls[i]; in idxd_wq_alloc_resources()
148 desc->compl_dma = wq->compls_addr + idxd->data->compl_size * i; in idxd_wq_alloc_resources()
150 desc->wq = wq; in idxd_wq_alloc_resources()
157 free_descs(wq); in idxd_wq_alloc_resources()
159 dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr); in idxd_wq_alloc_resources()
161 free_hw_descs(wq); in idxd_wq_alloc_resources()
166 void idxd_wq_free_resources(struct idxd_wq *wq) in idxd_wq_free_resources() argument
168 struct device *dev = &wq->idxd->pdev->dev; in idxd_wq_free_resources()
170 if (wq->type != IDXD_WQT_KERNEL) in idxd_wq_free_resources()
173 free_hw_descs(wq); in idxd_wq_free_resources()
174 free_descs(wq); in idxd_wq_free_resources()
175 dma_free_coherent(dev, wq->compls_size, wq->compls, wq->compls_addr); in idxd_wq_free_resources()
176 sbitmap_queue_free(&wq->sbq); in idxd_wq_free_resources()
180 int idxd_wq_enable(struct idxd_wq *wq) in idxd_wq_enable() argument
182 struct idxd_device *idxd = wq->idxd; in idxd_wq_enable()
186 if (wq->state == IDXD_WQ_ENABLED) { in idxd_wq_enable()
187 dev_dbg(dev, "WQ %d already enabled\n", wq->id); in idxd_wq_enable()
191 idxd_cmd_exec(idxd, IDXD_CMD_ENABLE_WQ, wq->id, &status); in idxd_wq_enable()
195 dev_dbg(dev, "WQ enable failed: %#x\n", status); in idxd_wq_enable()
199 wq->state = IDXD_WQ_ENABLED; in idxd_wq_enable()
200 set_bit(wq->id, idxd->wq_enable_map); in idxd_wq_enable()
201 dev_dbg(dev, "WQ %d enabled\n", wq->id); in idxd_wq_enable()
205 int idxd_wq_disable(struct idxd_wq *wq, bool reset_config) in idxd_wq_disable() argument
207 struct idxd_device *idxd = wq->idxd; in idxd_wq_disable()
211 dev_dbg(dev, "Disabling WQ %d\n", wq->id); in idxd_wq_disable()
213 if (wq->state != IDXD_WQ_ENABLED) { in idxd_wq_disable()
214 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state); in idxd_wq_disable()
218 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16); in idxd_wq_disable()
222 dev_dbg(dev, "WQ disable failed: %#x\n", status); in idxd_wq_disable()
227 idxd_wq_disable_cleanup(wq); in idxd_wq_disable()
228 clear_bit(wq->id, idxd->wq_enable_map); in idxd_wq_disable()
229 wq->state = IDXD_WQ_DISABLED; in idxd_wq_disable()
230 dev_dbg(dev, "WQ %d disabled\n", wq->id); in idxd_wq_disable()
234 void idxd_wq_drain(struct idxd_wq *wq) in idxd_wq_drain() argument
236 struct idxd_device *idxd = wq->idxd; in idxd_wq_drain()
240 if (wq->state != IDXD_WQ_ENABLED) { in idxd_wq_drain()
241 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state); in idxd_wq_drain()
245 dev_dbg(dev, "Draining WQ %d\n", wq->id); in idxd_wq_drain()
246 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16); in idxd_wq_drain()
250 void idxd_wq_reset(struct idxd_wq *wq) in idxd_wq_reset() argument
252 struct idxd_device *idxd = wq->idxd; in idxd_wq_reset()
256 if (wq->state != IDXD_WQ_ENABLED) { in idxd_wq_reset()
257 dev_dbg(dev, "WQ %d in wrong state: %d\n", wq->id, wq->state); in idxd_wq_reset()
261 operand = BIT(wq->id % 16) | ((wq->id / 16) << 16); in idxd_wq_reset()
263 idxd_wq_disable_cleanup(wq); in idxd_wq_reset()
266 int idxd_wq_map_portal(struct idxd_wq *wq) in idxd_wq_map_portal() argument
268 struct idxd_device *idxd = wq->idxd; in idxd_wq_map_portal()
274 start += idxd_get_wq_portal_full_offset(wq->id, IDXD_PORTAL_LIMITED); in idxd_wq_map_portal()
276 wq->portal = devm_ioremap(dev, start, IDXD_PORTAL_SIZE); in idxd_wq_map_portal()
277 if (!wq->portal) in idxd_wq_map_portal()
283 void idxd_wq_unmap_portal(struct idxd_wq *wq) in idxd_wq_unmap_portal() argument
285 struct device *dev = &wq->idxd->pdev->dev; in idxd_wq_unmap_portal()
287 devm_iounmap(dev, wq->portal); in idxd_wq_unmap_portal()
288 wq->portal = NULL; in idxd_wq_unmap_portal()
289 wq->portal_offset = 0; in idxd_wq_unmap_portal()
297 struct idxd_wq *wq = idxd->wqs[i]; in idxd_wqs_unmap_portal() local
299 if (wq->portal) in idxd_wqs_unmap_portal()
300 idxd_wq_unmap_portal(wq); in idxd_wqs_unmap_portal()
304 static void __idxd_wq_set_pasid_locked(struct idxd_wq *wq, int pasid) in __idxd_wq_set_pasid_locked() argument
306 struct idxd_device *idxd = wq->idxd; in __idxd_wq_set_pasid_locked()
310 offset = WQCFG_OFFSET(idxd, wq->id, WQCFG_PASID_IDX); in __idxd_wq_set_pasid_locked()
315 wq->wqcfg->bits[WQCFG_PASID_IDX] = wqcfg.bits[WQCFG_PASID_IDX]; in __idxd_wq_set_pasid_locked()
320 int idxd_wq_set_pasid(struct idxd_wq *wq, int pasid) in idxd_wq_set_pasid() argument
324 rc = idxd_wq_disable(wq, false); in idxd_wq_set_pasid()
328 __idxd_wq_set_pasid_locked(wq, pasid); in idxd_wq_set_pasid()
330 rc = idxd_wq_enable(wq); in idxd_wq_set_pasid()
337 int idxd_wq_disable_pasid(struct idxd_wq *wq) in idxd_wq_disable_pasid() argument
339 struct idxd_device *idxd = wq->idxd; in idxd_wq_disable_pasid()
344 rc = idxd_wq_disable(wq, false); in idxd_wq_disable_pasid()
348 offset = WQCFG_OFFSET(idxd, wq->id, WQCFG_PASID_IDX); in idxd_wq_disable_pasid()
356 rc = idxd_wq_enable(wq); in idxd_wq_disable_pasid()
363 static void idxd_wq_disable_cleanup(struct idxd_wq *wq) in idxd_wq_disable_cleanup() argument
365 struct idxd_device *idxd = wq->idxd; in idxd_wq_disable_cleanup()
367 lockdep_assert_held(&wq->wq_lock); in idxd_wq_disable_cleanup()
368 wq->state = IDXD_WQ_DISABLED; in idxd_wq_disable_cleanup()
369 memset(wq->wqcfg, 0, idxd->wqcfg_size); in idxd_wq_disable_cleanup()
370 wq->type = IDXD_WQT_NONE; in idxd_wq_disable_cleanup()
371 wq->threshold = 0; in idxd_wq_disable_cleanup()
372 wq->priority = 0; in idxd_wq_disable_cleanup()
373 wq->enqcmds_retries = IDXD_ENQCMDS_RETRIES; in idxd_wq_disable_cleanup()
374 wq->flags = 0; in idxd_wq_disable_cleanup()
375 memset(wq->name, 0, WQ_NAME_SIZE); in idxd_wq_disable_cleanup()
376 wq->max_xfer_bytes = WQ_DEFAULT_MAX_XFER; in idxd_wq_disable_cleanup()
377 idxd_wq_set_max_batch_size(idxd->data->type, wq, WQ_DEFAULT_MAX_BATCH); in idxd_wq_disable_cleanup()
378 if (wq->opcap_bmap) in idxd_wq_disable_cleanup()
379 bitmap_copy(wq->opcap_bmap, idxd->opcap_bmap, IDXD_MAX_OPCAP_BITS); in idxd_wq_disable_cleanup()
382 static void idxd_wq_device_reset_cleanup(struct idxd_wq *wq) in idxd_wq_device_reset_cleanup() argument
384 lockdep_assert_held(&wq->wq_lock); in idxd_wq_device_reset_cleanup()
386 wq->size = 0; in idxd_wq_device_reset_cleanup()
387 wq->group = NULL; in idxd_wq_device_reset_cleanup()
392 struct idxd_wq *wq = container_of(ref, struct idxd_wq, wq_active); in idxd_wq_ref_release() local
394 complete(&wq->wq_dead); in idxd_wq_ref_release()
397 int idxd_wq_init_percpu_ref(struct idxd_wq *wq) in idxd_wq_init_percpu_ref() argument
401 memset(&wq->wq_active, 0, sizeof(wq->wq_active)); in idxd_wq_init_percpu_ref()
402 rc = percpu_ref_init(&wq->wq_active, idxd_wq_ref_release, in idxd_wq_init_percpu_ref()
406 reinit_completion(&wq->wq_dead); in idxd_wq_init_percpu_ref()
407 reinit_completion(&wq->wq_resurrect); in idxd_wq_init_percpu_ref()
412 void __idxd_wq_quiesce(struct idxd_wq *wq) in __idxd_wq_quiesce() argument
414 lockdep_assert_held(&wq->wq_lock); in __idxd_wq_quiesce()
415 reinit_completion(&wq->wq_resurrect); in __idxd_wq_quiesce()
416 percpu_ref_kill(&wq->wq_active); in __idxd_wq_quiesce()
417 complete_all(&wq->wq_resurrect); in __idxd_wq_quiesce()
418 wait_for_completion(&wq->wq_dead); in __idxd_wq_quiesce()
422 void idxd_wq_quiesce(struct idxd_wq *wq) in idxd_wq_quiesce() argument
424 mutex_lock(&wq->wq_lock); in idxd_wq_quiesce()
425 __idxd_wq_quiesce(wq); in idxd_wq_quiesce()
426 mutex_unlock(&wq->wq_lock); in idxd_wq_quiesce()
714 struct idxd_wq *wq = idxd->wqs[i]; in idxd_device_wqs_clear_state() local
716 mutex_lock(&wq->wq_lock); in idxd_device_wqs_clear_state()
717 idxd_wq_disable_cleanup(wq); in idxd_device_wqs_clear_state()
718 idxd_wq_device_reset_cleanup(wq); in idxd_device_wqs_clear_state()
719 mutex_unlock(&wq->wq_lock); in idxd_device_wqs_clear_state()
728 * Clearing wq state is protected by wq lock. in idxd_device_clear_state()
857 dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n", in idxd_group_config_write()
911 static int idxd_wq_config_write(struct idxd_wq *wq) in idxd_wq_config_write() argument
913 struct idxd_device *idxd = wq->idxd; in idxd_wq_config_write()
918 if (!wq->group) in idxd_wq_config_write()
923 * wq reset. This will copy back the sticky values that are present on some devices. in idxd_wq_config_write()
926 wq_offset = WQCFG_OFFSET(idxd, wq->id, i); in idxd_wq_config_write()
927 wq->wqcfg->bits[i] |= ioread32(idxd->reg_base + wq_offset); in idxd_wq_config_write()
930 if (wq->size == 0 && wq->type != IDXD_WQT_NONE) in idxd_wq_config_write()
931 wq->size = WQ_DEFAULT_QUEUE_DEPTH; in idxd_wq_config_write()
934 wq->wqcfg->wq_size = wq->size; in idxd_wq_config_write()
937 wq->wqcfg->wq_thresh = wq->threshold; in idxd_wq_config_write()
940 if (wq_dedicated(wq)) in idxd_wq_config_write()
941 wq->wqcfg->mode = 1; in idxd_wq_config_write()
944 * The WQ priv bit is set depending on the WQ type. priv = 1 if the in idxd_wq_config_write()
945 * WQ type is kernel to indicate privileged access. This setting only in idxd_wq_config_write()
946 * matters for dedicated WQ. According to the DSA spec: in idxd_wq_config_write()
947 * If the WQ is in dedicated mode, WQ PASID Enable is 1, and the in idxd_wq_config_write()
951 * In the case of a dedicated kernel WQ that is not able to support in idxd_wq_config_write()
954 if (wq_dedicated(wq) && wq->wqcfg->pasid_en && in idxd_wq_config_write()
956 wq->type == IDXD_WQT_KERNEL) { in idxd_wq_config_write()
961 wq->wqcfg->priority = wq->priority; in idxd_wq_config_write()
964 test_bit(WQ_FLAG_BLOCK_ON_FAULT, &wq->flags) && in idxd_wq_config_write()
965 !test_bit(WQ_FLAG_PRS_DISABLE, &wq->flags)) in idxd_wq_config_write()
966 wq->wqcfg->bof = 1; in idxd_wq_config_write()
969 wq->wqcfg->wq_ats_disable = test_bit(WQ_FLAG_ATS_DISABLE, &wq->flags); in idxd_wq_config_write()
972 wq->wqcfg->wq_prs_disable = test_bit(WQ_FLAG_PRS_DISABLE, &wq->flags); in idxd_wq_config_write()
975 wq->wqcfg->max_xfer_shift = ilog2(wq->max_xfer_bytes); in idxd_wq_config_write()
976 idxd_wqcfg_set_max_batch_shift(idxd->data->type, wq->wqcfg, ilog2(wq->max_batch_size)); in idxd_wq_config_write()
979 if (idxd->hw.wq_cap.op_config && wq->opcap_bmap) { in idxd_wq_config_write()
980 memset(wq->wqcfg->op_config, 0, IDXD_MAX_OPCAP_BITS / 8); in idxd_wq_config_write()
981 for_each_set_bit(n, wq->opcap_bmap, IDXD_MAX_OPCAP_BITS) { in idxd_wq_config_write()
985 wq->wqcfg->op_config[idx] |= BIT(pos); in idxd_wq_config_write()
989 dev_dbg(dev, "WQ %d CFGs\n", wq->id); in idxd_wq_config_write()
991 wq_offset = WQCFG_OFFSET(idxd, wq->id, i); in idxd_wq_config_write()
992 iowrite32(wq->wqcfg->bits[i], idxd->reg_base + wq_offset); in idxd_wq_config_write()
993 dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", in idxd_wq_config_write()
994 wq->id, i, wq_offset, in idxd_wq_config_write()
1006 struct idxd_wq *wq = idxd->wqs[i]; in idxd_wqs_config_write() local
1008 rc = idxd_wq_config_write(wq); in idxd_wqs_config_write()
1070 struct idxd_wq *wq; in idxd_wqs_setup() local
1082 wq = idxd->wqs[i]; in idxd_wqs_setup()
1083 group = wq->group; in idxd_wqs_setup()
1085 if (!wq->group) in idxd_wqs_setup()
1088 if (wq_shared(wq) && !wq_shared_supported(wq)) { in idxd_wqs_setup()
1090 dev_warn(dev, "No shared wq support but configured.\n"); in idxd_wqs_setup()
1094 group->grpcfg.wqs[wq->id / 64] |= BIT(wq->id % 64); in idxd_wqs_setup()
1132 static int idxd_wq_load_config(struct idxd_wq *wq) in idxd_wq_load_config() argument
1134 struct idxd_device *idxd = wq->idxd; in idxd_wq_load_config()
1139 wqcfg_offset = WQCFG_OFFSET(idxd, wq->id, 0); in idxd_wq_load_config()
1140 memcpy_fromio(wq->wqcfg, idxd->reg_base + wqcfg_offset, idxd->wqcfg_size); in idxd_wq_load_config()
1142 wq->size = wq->wqcfg->wq_size; in idxd_wq_load_config()
1143 wq->threshold = wq->wqcfg->wq_thresh; in idxd_wq_load_config()
1145 /* The driver does not support shared WQ mode in read-only config yet */ in idxd_wq_load_config()
1146 if (wq->wqcfg->mode == 0 || wq->wqcfg->pasid_en) in idxd_wq_load_config()
1149 set_bit(WQ_FLAG_DEDICATED, &wq->flags); in idxd_wq_load_config()
1151 wq->priority = wq->wqcfg->priority; in idxd_wq_load_config()
1153 wq->max_xfer_bytes = 1ULL << wq->wqcfg->max_xfer_shift; in idxd_wq_load_config()
1154 idxd_wq_set_max_batch_size(idxd->data->type, wq, 1U << wq->wqcfg->max_batch_shift); in idxd_wq_load_config()
1157 wqcfg_offset = WQCFG_OFFSET(idxd, wq->id, i); in idxd_wq_load_config()
1158 dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", wq->id, i, wqcfg_offset, wq->wqcfg->bits[i]); in idxd_wq_load_config()
1175 struct idxd_wq *wq; in idxd_group_load_config() local
1179 dev_dbg(dev, "GRPCFG wq[%d:%d: %#x]: %#llx\n", in idxd_group_load_config()
1185 /* Iterate through all 64 bits and check for wq set */ in idxd_group_load_config()
1193 /* Set group assignment for wq if wq bit is set */ in idxd_group_load_config()
1195 wq = idxd->wqs[id]; in idxd_group_load_config()
1196 wq->group = group; in idxd_group_load_config()
1239 struct idxd_wq *wq = idxd->wqs[i]; in idxd_device_load_config() local
1241 rc = idxd_wq_load_config(wq); in idxd_device_load_config()
1273 * wq is being disabled. Any remaining descriptors are in idxd_flush_pending_descs()
1305 void idxd_wq_free_irq(struct idxd_wq *wq) in idxd_wq_free_irq() argument
1307 struct idxd_device *idxd = wq->idxd; in idxd_wq_free_irq()
1308 struct idxd_irq_entry *ie = &wq->ie; in idxd_wq_free_irq()
1310 if (wq->type != IDXD_WQT_KERNEL) in idxd_wq_free_irq()
1323 int idxd_wq_request_irq(struct idxd_wq *wq) in idxd_wq_request_irq() argument
1325 struct idxd_device *idxd = wq->idxd; in idxd_wq_request_irq()
1331 if (wq->type != IDXD_WQT_KERNEL) in idxd_wq_request_irq()
1334 ie = &wq->ie; in idxd_wq_request_irq()
1365 int idxd_drv_enable_wq(struct idxd_wq *wq) in idxd_drv_enable_wq() argument
1367 struct idxd_device *idxd = wq->idxd; in idxd_drv_enable_wq()
1371 lockdep_assert_held(&wq->wq_lock); in idxd_drv_enable_wq()
1378 if (wq->state != IDXD_WQ_DISABLED) { in idxd_drv_enable_wq()
1379 dev_dbg(dev, "wq %d already enabled.\n", wq->id); in idxd_drv_enable_wq()
1385 if (!wq->group) { in idxd_drv_enable_wq()
1386 dev_dbg(dev, "wq %d not attached to group.\n", wq->id); in idxd_drv_enable_wq()
1391 if (strlen(wq->name) == 0) { in idxd_drv_enable_wq()
1393 dev_dbg(dev, "wq %d name not set.\n", wq->id); in idxd_drv_enable_wq()
1397 /* Shared WQ checks */ in idxd_drv_enable_wq()
1398 if (wq_shared(wq)) { in idxd_drv_enable_wq()
1399 if (!wq_shared_supported(wq)) { in idxd_drv_enable_wq()
1401 dev_dbg(dev, "PASID not enabled and shared wq.\n"); in idxd_drv_enable_wq()
1405 * Shared wq with the threshold set to 0 means the user in idxd_drv_enable_wq()
1407 * dedicated wq but did not set threshold. A value in idxd_drv_enable_wq()
1408 * of 0 would effectively disable the shared wq. The in idxd_drv_enable_wq()
1412 if (wq->threshold == 0) { in idxd_drv_enable_wq()
1414 dev_dbg(dev, "Shared wq and threshold 0.\n"); in idxd_drv_enable_wq()
1420 * In the event that the WQ is configurable for pasid, the driver in idxd_drv_enable_wq()
1424 * A dedicated wq that is not 'kernel' type will configure pasid and in idxd_drv_enable_wq()
1428 if (wq_pasid_enabled(wq)) { in idxd_drv_enable_wq()
1429 if (is_idxd_wq_kernel(wq) || wq_shared(wq)) { in idxd_drv_enable_wq()
1430 u32 pasid = wq_dedicated(wq) ? idxd->pasid : 0; in idxd_drv_enable_wq()
1432 __idxd_wq_set_pasid_locked(wq, pasid); in idxd_drv_enable_wq()
1443 dev_dbg(dev, "Writing wq %d config failed: %d\n", wq->id, rc); in idxd_drv_enable_wq()
1447 rc = idxd_wq_enable(wq); in idxd_drv_enable_wq()
1449 dev_dbg(dev, "wq %d enabling failed: %d\n", wq->id, rc); in idxd_drv_enable_wq()
1453 rc = idxd_wq_map_portal(wq); in idxd_drv_enable_wq()
1456 dev_dbg(dev, "wq %d portal mapping failed: %d\n", wq->id, rc); in idxd_drv_enable_wq()
1460 wq->client_count = 0; in idxd_drv_enable_wq()
1462 rc = idxd_wq_request_irq(wq); in idxd_drv_enable_wq()
1465 dev_dbg(dev, "WQ %d irq setup failed: %d\n", wq->id, rc); in idxd_drv_enable_wq()
1469 rc = idxd_wq_alloc_resources(wq); in idxd_drv_enable_wq()
1472 dev_dbg(dev, "WQ resource alloc failed\n"); in idxd_drv_enable_wq()
1476 rc = idxd_wq_init_percpu_ref(wq); in idxd_drv_enable_wq()
1486 idxd_wq_free_resources(wq); in idxd_drv_enable_wq()
1488 idxd_wq_free_irq(wq); in idxd_drv_enable_wq()
1490 idxd_wq_unmap_portal(wq); in idxd_drv_enable_wq()
1492 if (idxd_wq_disable(wq, false)) in idxd_drv_enable_wq()
1493 dev_dbg(dev, "wq %s disable failed\n", dev_name(wq_confdev(wq))); in idxd_drv_enable_wq()
1499 void idxd_drv_disable_wq(struct idxd_wq *wq) in idxd_drv_disable_wq() argument
1501 struct idxd_device *idxd = wq->idxd; in idxd_drv_disable_wq()
1504 lockdep_assert_held(&wq->wq_lock); in idxd_drv_disable_wq()
1506 if (idxd_wq_refcount(wq)) in idxd_drv_disable_wq()
1507 dev_warn(dev, "Clients has claim on wq %d: %d\n", in idxd_drv_disable_wq()
1508 wq->id, idxd_wq_refcount(wq)); in idxd_drv_disable_wq()
1510 idxd_wq_unmap_portal(wq); in idxd_drv_disable_wq()
1511 idxd_wq_drain(wq); in idxd_drv_disable_wq()
1512 idxd_wq_free_irq(wq); in idxd_drv_disable_wq()
1513 idxd_wq_reset(wq); in idxd_drv_disable_wq()
1514 idxd_wq_free_resources(wq); in idxd_drv_disable_wq()
1515 percpu_ref_exit(&wq->wq_active); in idxd_drv_disable_wq()
1516 wq->type = IDXD_WQT_NONE; in idxd_drv_disable_wq()
1517 wq->client_count = 0; in idxd_drv_disable_wq()
1586 struct idxd_wq *wq = idxd->wqs[i]; in idxd_device_drv_remove() local
1587 struct device *wq_dev = wq_confdev(wq); in idxd_device_drv_remove()
1589 if (wq->state == IDXD_WQ_DISABLED) in idxd_device_drv_remove()
1591 dev_warn(dev, "Active wq %d on disable %s.\n", i, dev_name(wq_dev)); in idxd_device_drv_remove()