313 	struct axi_dma_lli *lli;  in axi_desc_get()  local
316 	lli = dma_pool_zalloc(chan->desc_pool, GFP_NOWAIT, &phys);  in axi_desc_get()
317 	if (unlikely(!lli)) {  in axi_desc_get()
326 	return lli;  in axi_desc_get()
338 		dma_pool_free(chan->desc_pool, hw_desc->lli, hw_desc->llp);  in axi_desc_put()
391 	desc->lli->llp = cpu_to_le64(adr);  in write_desc_llp()
429 	u8 lms = 0; /* Select AXI0 master for LLI fetching */  in axi_chan_block_xfer_start()
527 	/* LLI address must be aligned to a 64-byte boundary */  in dma_chan_alloc_chan_resources()
600  * If DW_axi_dmac sees CHx_CTL.ShadowReg_Or_LLI_Last bit of the fetched LLI
609 	val = le32_to_cpu(desc->lli->ctl_hi);  in set_desc_last()
611 	desc->lli->ctl_hi = cpu_to_le32(val);  in set_desc_last()
616 	desc->lli->sar = cpu_to_le64(adr);  in write_desc_sar()
621 	desc->lli->dar = cpu_to_le64(adr);  in write_desc_dar()
629 	val = le32_to_cpu(desc->lli->ctl_lo);  in set_desc_src_master()
631 	desc->lli->ctl_lo = cpu_to_le32(val);  in set_desc_src_master()
640 	val = le32_to_cpu(hw_desc->lli->ctl_lo);  in set_desc_dest_master()
646 	hw_desc->lli->ctl_lo = cpu_to_le32(val);  in set_desc_dest_master()
699 	hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);  in dw_axi_dma_set_hw_desc()
700 	if (unlikely(!hw_desc->lli))  in dw_axi_dma_set_hw_desc()
712 	hw_desc->lli->ctl_hi = cpu_to_le32(ctlhi);  in dw_axi_dma_set_hw_desc()
722 	hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);  in dw_axi_dma_set_hw_desc()
726 	hw_desc->lli->ctl_lo = cpu_to_le32(ctllo);  in dw_axi_dma_set_hw_desc()
780 	u8 lms = 0; /* Select AXI0 master for LLI fetching */  in dw_axi_dma_chan_prep_cyclic()
858 	u8 lms = 0; /* Select AXI0 master for LLI fetching */  in dw_axi_dma_chan_prep_slave_sg()
930 	u8 lms = 0; /* Select AXI0 master for LLI fetching */  in dma_chan_prep_dma_memcpy()
967 		hw_desc->lli = axi_desc_get(chan, &hw_desc->llp);  in dma_chan_prep_dma_memcpy()
968 		if (unlikely(!hw_desc->lli))  in dma_chan_prep_dma_memcpy()
973 		hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1);  in dma_chan_prep_dma_memcpy()
984 		hw_desc->lli->ctl_hi = cpu_to_le32(reg);  in dma_chan_prep_dma_memcpy()
992 		hw_desc->lli->ctl_lo = cpu_to_le32(reg);  in dma_chan_prep_dma_memcpy()
1036 	if (!desc->lli) {  in axi_chan_dump_lli()
1037 		dev_err(dchan2dev(&chan->vc.chan), "NULL LLI\n");  in axi_chan_dump_lli()
1043 		le64_to_cpu(desc->lli->sar),  in axi_chan_dump_lli()
1044 		le64_to_cpu(desc->lli->dar),  in axi_chan_dump_lli()
1045 		le64_to_cpu(desc->lli->llp),  in axi_chan_dump_lli()
1046 		le32_to_cpu(desc->lli->block_ts_lo),  in axi_chan_dump_lli()
1047 		le32_to_cpu(desc->lli->ctl_hi),  in axi_chan_dump_lli()
1048 		le32_to_cpu(desc->lli->ctl_lo));  in axi_chan_dump_lli()
1127 					axi_chan_irq_clear(chan, hw_desc->lli->status_lo);  in axi_chan_block_xfer_complete()
1128 					hw_desc->lli->ctl_hi |= CH_CTL_H_LLI_VALID;  in axi_chan_block_xfer_complete()