32 #include "dw-axi-dmac.h"
37  * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
105 	if (chan->chip->dw->hdata->reg_map_8_channels &&  in axi_chan_config_write()
106 	    !chan->chip->dw->hdata->use_cfg2) {  in axi_chan_config_write()
198 	if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) {  in axi_chan_disable()
213 		if (chan->chip->dw->hdata->reg_map_8_channels)  in axi_chan_disable()
225 	if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) {  in axi_chan_enable()
239 		if (chan->chip->dw->hdata->reg_map_8_channels) {  in axi_chan_enable()
254 	if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16)  in axi_chan_is_hw_enable()
270 	for (i = 0; i < chip->dw->hdata->nr_channels; i++) {  in axi_dma_hw_init()
271 		axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL);  in axi_dma_hw_init()
272 		axi_chan_disable(&chip->dw->chan[i]);  in axi_dma_hw_init()
282 	u32 max_width = chan->chip->dw->hdata->m_data_width;  in axi_chan_get_xfer_width()
426 	u32 priority = chan->chip->dw->hdata->priority[chan->id];  in axi_chan_block_xfer_start()
641 	if (desc->chan->chip->dw->hdata->nr_masters > 1)  in set_desc_dest_master()
653 	unsigned int data_width = BIT(chan->chip->dw->hdata->m_data_width);  in dw_axi_dma_set_hw_desc()
662 	axi_block_ts = chan->chip->dw->hdata->block_size[chan->id];  in dw_axi_dma_set_hw_desc()
705 	if (chan->chip->dw->hdata->restrict_axi_burst_len) {  in dw_axi_dma_set_hw_desc()
706 		burst_len = chan->chip->dw->hdata->axi_rw_burst_len;  in dw_axi_dma_set_hw_desc()
741 	axi_block_ts = chan->chip->dw->hdata->block_size[chan->id];  in calculate_block_len()
745 		data_width = BIT(chan->chip->dw->hdata->m_data_width);  in calculate_block_len()
935 	max_block_ts = chan->chip->dw->hdata->block_size[chan->id];  in dma_chan_prep_dma_memcpy()
976 		if (chan->chip->dw->hdata->restrict_axi_burst_len) {  in dma_chan_prep_dma_memcpy()
977 			u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len;  in dma_chan_prep_dma_memcpy()
1152 	struct dw_axi_dma *dw = chip->dw;  in dw_axi_dma_interrupt()  local
1161 	for (i = 0; i < dw->hdata->nr_channels; i++) {  in dw_axi_dma_interrupt()
1162 		chan = &dw->chan[i];  in dw_axi_dma_interrupt()
1226 	if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) {  in dma_chan_pause()
1239 		if (chan->chip->dw->hdata->reg_map_8_channels) {  in dma_chan_pause()
1273 	if (chan->chip->dw->hdata->nr_channels >= DMAC_CHAN_16) {  in axi_chan_resume()
1286 		if (chan->chip->dw->hdata->reg_map_8_channels) {  in axi_chan_resume()
1363 	struct dw_axi_dma *dw = ofdma->of_dma_data;  in dw_axi_dma_of_xlate()  local
1367 	dchan = dma_get_any_slave_channel(&dw->dma);  in dw_axi_dma_of_xlate()
1388 	chip->dw->hdata->nr_channels = tmp;  in parse_device_properties()
1390 		chip->dw->hdata->reg_map_8_channels = true;  in parse_device_properties()
1398 	chip->dw->hdata->nr_masters = tmp;  in parse_device_properties()
1406 	chip->dw->hdata->m_data_width = tmp;  in parse_device_properties()
1409 					     chip->dw->hdata->nr_channels);  in parse_device_properties()
1412 	for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) {  in parse_device_properties()
1416 		chip->dw->hdata->block_size[tmp] = carr[tmp];  in parse_device_properties()
1420 					     chip->dw->hdata->nr_channels);  in parse_device_properties()
1424 	for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) {  in parse_device_properties()
1425 		if (carr[tmp] >= chip->dw->hdata->nr_channels)  in parse_device_properties()
1428 		chip->dw->hdata->priority[tmp] = carr[tmp];  in parse_device_properties()
1439 		chip->dw->hdata->restrict_axi_burst_len = true;  in parse_device_properties()
1440 		chip->dw->hdata->axi_rw_burst_len = tmp;  in parse_device_properties()
1467 	struct dw_axi_dma *dw;  in dw_probe()  local
1478 	dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL);  in dw_probe()
1479 	if (!dw)  in dw_probe()
1486 	chip->dw = dw;  in dw_probe()
1488 	chip->dw->hdata = hdata;  in dw_probe()
1511 	chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2);  in dw_probe()
1525 	dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels,  in dw_probe()
1526 				sizeof(*dw->chan), GFP_KERNEL);  in dw_probe()
1527 	if (!dw->chan)  in dw_probe()
1534 	INIT_LIST_HEAD(&dw->dma.channels);  in dw_probe()
1536 		struct axi_dma_chan *chan = &dw->chan[i];  in dw_probe()
1544 		vchan_init(&chan->vc, &dw->dma);  in dw_probe()
1548 	dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);  in dw_probe()
1549 	dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);  in dw_probe()
1550 	dma_cap_set(DMA_CYCLIC, dw->dma.cap_mask);  in dw_probe()
1553 	dw->dma.max_burst = hdata->axi_rw_burst_len;  in dw_probe()
1554 	dw->dma.src_addr_widths = AXI_DMA_BUSWIDTHS;  in dw_probe()
1555 	dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS;  in dw_probe()
1556 	dw->dma.directions = BIT(DMA_MEM_TO_MEM);  in dw_probe()
1557 	dw->dma.directions |= BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM);  in dw_probe()
1558 	dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;  in dw_probe()
1560 	dw->dma.dev = chip->dev;  in dw_probe()
1561 	dw->dma.device_tx_status = dma_chan_tx_status;  in dw_probe()
1562 	dw->dma.device_issue_pending = dma_chan_issue_pending;  in dw_probe()
1563 	dw->dma.device_terminate_all = dma_chan_terminate_all;  in dw_probe()
1564 	dw->dma.device_pause = dma_chan_pause;  in dw_probe()
1565 	dw->dma.device_resume = dma_chan_resume;  in dw_probe()
1567 	dw->dma.device_alloc_chan_resources = dma_chan_alloc_chan_resources;  in dw_probe()
1568 	dw->dma.device_free_chan_resources = dma_chan_free_chan_resources;  in dw_probe()
1570 	dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy;  in dw_probe()
1571 	dw->dma.device_synchronize = dw_axi_dma_synchronize;  in dw_probe()
1572 	dw->dma.device_config = dw_axi_dma_chan_slave_config;  in dw_probe()
1573 	dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg;  in dw_probe()
1574 	dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic;  in dw_probe()
1581 	dw->dma.dev->dma_parms = &dw->dma_parms;  in dw_probe()
1601 	ret = dmaenginem_async_device_register(&dw->dma);  in dw_probe()
1607 					 dw_axi_dma_of_xlate, dw);  in dw_probe()
1613 		 dw->hdata->nr_channels);  in dw_probe()
1626 	struct dw_axi_dma *dw = chip->dw;  in dw_remove()  local
1634 	for (i = 0; i < dw->hdata->nr_channels; i++) {  in dw_remove()
1635 		axi_chan_disable(&chip->dw->chan[i]);  in dw_remove()
1636 		axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL);  in dw_remove()
1649 	list_for_each_entry_safe(chan, _chan, &dw->dma.channels,  in dw_remove()