Lines Matching +full:dma +full:- +full:engine

1 # SPDX-License-Identifier: GPL-2.0-only
5 	tristate  "AMD AE4DMA Engine"
12 	  provides DMA capabilities to perform high bandwidth memory to
13 	  memory and IO copy operations. It performs DMA transfer through
14 	  queue-based descriptor management. This DMA controller is intended
15 	  to be used with AMD Non-Transparent Bridge devices and not for
16 	  general purpose peripheral DMA.
19 	tristate  "AMD PassThru DMA Engine"
25 	  provides DMA capabilities to perform high bandwidth memory to
26 	  memory and IO copy operations. It performs DMA transfer through
27 	  queue-based descriptor management. This DMA controller is intended
28 	  to be used with AMD Non-Transparent Bridge devices and not for
29 	  general purpose peripheral DMA.
32 	tristate "AMD Queue-based DMA"
38 	  Enable support for the AMD Queue-based DMA subsystem. The primary
39 	  mechanism to transfer data using the QDMA is for the QDMA engine to