Lines Matching +full:crypto +full:- +full:engine
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * K3 SA2UL crypto accelerator driver
5 * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com
15 #include <crypto/aes.h>
16 #include <crypto/sha1.h>
17 #include <crypto/sha2.h>
35 * Encoding used to identify the typo of crypto operation
62 ((ctx_sz) ? ((ctx_sz) / 32 - 1) : 0)
70 /* Next Engine Select code in CP_ACE */
71 #define SA_ENG_ID_EM1 2 /* Enc/Dec engine with AES/DEC core */
73 #define SA_ENG_ID_AM1 4 /* Auth. engine with SHA1/MD5/SHA2 core */
74 #define SA_ENG_ID_AM2 5 /* Authentication engine for pass 2 */
80 #define SA_CMDL_OFFSET_NESC 0 /* Next Engine Select Code */
81 #define SA_CMDL_OFFSET_LABEL_LEN 1 /* Engine Command Label Length */
82 /* 16-bit Length of Data to be processed */
96 /* SWINFO word-0 flags */
103 * by the PHP engine in SA.
118 /* Size of security context for PHP engine */
125 * Bit 0-1: Fetch PHP Bytes
126 * Bit 2-3: Fetch Encryption/Air Ciphering Bytes
127 * Bit 4-5: Fetch Authentication Bytes or Encr pass 2
128 * Bit 6-7: Evict PHP Bytes
155 #define SA_ALIGN_MASK (sizeof(u32) - 1)
178 * struct sa_crypto_data - Crypto driver instance data
200 spinlock_t scid_lock; /* lock for SC-ID allocation */
266 * in PSDATA to identify the crypto request context.
267 * word-0: Request type
268 * word-1: pointer to request
273 #define SA_MAX_CMDL_WORDS (SA_DMA_NUM_PS_WORDS - SA_PSDATA_CTX_WORDS)
292 /* Store Auxiliary data such as K2/K3 subkeys in AES-XCBC */
352 SA_EALG_ID_CCM, /* Counter with CBC-MAC mode */
364 SA_AALG_ID_SHA2_224, /* 224-bit SHA2 mode */
365 SA_AALG_ID_SHA2_256, /* 256-bit SHA2 mode */
366 SA_AALG_ID_SHA2_512, /* 512-bit SHA2 mode */
369 SA_AALG_ID_HMAC_SHA2_224, /* HMAC with 224-bit SHA2 mode */
370 SA_AALG_ID_HMAC_SHA2_256, /* HMAC with 256-bit SHA2 mode */
372 SA_AALG_ID_CMAC, /* Cipher-based Mes. Auth. Code mode */
378 * Mode control engine algorithms used to index the
398 * struct sa_eng_info: Security accelerator engine info
399 * @eng_id: Engine ID