Lines Matching +full:dma +full:- +full:queues
1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/dma-mapping.h>
11 /* Maximum queues in PF mode */
13 /* Maximum device queues */
19 * struct nitrox_cmdq - NITROX command queue
29 * @dma: dma address of the base
37 * @unalign_dma: unaligned dma address
51 dma_addr_t dma; member
68 * struct nitrox_hw - NITROX hardware information
69 * @partname: partname ex: CNN55xxx-xxx
120 * mbox_msg - Mailbox message data
149 * nitrox_vfdev - NITROX VF device instance in PF
152 * @nr_queues: number of queues enabled in VF
167 * struct nitrox_iov - SR-IOV information
169 * @max_vf_queues: Maximum number of queues allowed for VF
172 * @msix: MSI-X entry for PF in SR-IOV case
207 #define DEV(ndev) ((struct device *)(&(ndev)->pdev->dev))
210 ((ndev)->bar_addr + (offset))
213 * struct nitrox_device - NITROX Device Information.
224 * @nr_queues: Number of command queues
226 * @ctx_pool: DMA pool for crypto context
228 * @aqmq: AQM command queues
229 * @qvec: MSI-X queue vectors information
230 * @iov: SR-IOV informatin
231 * @num_vecs: number of MSI-X vectors
269 * nitrox_read_csr - Read from device register
277 return readq(ndev->bar_addr + offset); in nitrox_read_csr()
281 * nitrox_write_csr - Write to device register
289 writeq(value, (ndev->bar_addr + offset)); in nitrox_write_csr()
294 return atomic_read(&ndev->state) == __NDEV_READY; in nitrox_ready()
299 return atomic_read(&vfdev->state) == __NDEV_READY; in nitrox_vfdev_ready()