Lines Matching full:l0
209 * For Armada 37xx soc, L0(VSET0) VDD AVS value is set to SVC revision
211 * - L0 can be read out from the register of AVS_CTRL_0 and L0 voltage
213 * - L1 voltage should be about 100mv smaller than L0 voltage
214 * - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
216 * on L0 voltage and fill all AVS values to the AVS value table.
230 /* Get L0 VDD min value */ in armada37xx_cpufreq_avs_configure()
235 pr_err("L0 VDD MIN %d is not correct.\n", l0_vdd_min); in armada37xx_cpufreq_avs_configure()
242 * If L0 voltage is smaller than 1000mv, then all VDD sets in armada37xx_cpufreq_avs_configure()
243 * use L0 voltage; in armada37xx_cpufreq_avs_configure()
251 * Set the avs values for load L0 and L1 when base CPU frequency in armada37xx_cpufreq_avs_configure()
267 * L1 voltage is equal to L0 voltage - 100mv and it must be in armada37xx_cpufreq_avs_configure()
276 * L2 & L3 voltage is equal to L0 voltage - 150mv and it must in armada37xx_cpufreq_avs_configure()
285 * otherwise the CPU gets stuck when switching from load L1 to load L0. in armada37xx_cpufreq_avs_configure()
286 * Also ensure that avs value for load L1 is not higher than for L0. in armada37xx_cpufreq_avs_configure()