1 // SPDX-License-Identifier: GPL-2.0-only
5  * Counter driver for Texas Instruments Enhanced Quadrature Encoder Pulse (eQEP)
20 /* 32-bit registers */
31 /* 16-bit registers */
110 /* EQEP Inputs */
135 	regmap_read(priv->regmap32, QPOSCNT, &cnt);  in ti_eqep_count_read()
147 	regmap_read(priv->regmap32, QPOSMAX, &max);  in ti_eqep_count_write()
149 		return -EINVAL;  in ti_eqep_count_write()
151 	return regmap_write(priv->regmap32, QPOSCNT, val);  in ti_eqep_count_write()
161 	regmap_read(priv->regmap16, QDECCTL, &qdecctl);  in ti_eqep_function_read()
203 		return -EINVAL;  in ti_eqep_function_write()
206 	return regmap_write_bits(priv->regmap16, QDECCTL, QDECCTL_QSRC,  in ti_eqep_function_write()
232 		/* In direction-count mode only rising edge of QEPA is counted  in ti_eqep_action_read()
235 		switch (synapse->signal->id) {  in ti_eqep_action_read()
244 			return -EINVAL;  in ti_eqep_action_read()
248 		/* In up/down-count modes only QEPA is counted and QEPB is not  in ti_eqep_action_read()
251 		switch (synapse->signal->id) {  in ti_eqep_action_read()
253 			err = regmap_read(priv->regmap16, QDECCTL, &qdecctl);  in ti_eqep_action_read()
267 			return -EINVAL;  in ti_eqep_action_read()
271 		return -EINVAL;  in ti_eqep_action_read()
281 	list_for_each_entry(event_node, &counter->events_list, l) {  in ti_eqep_events_configure()
282 		switch (event_node->event) {  in ti_eqep_events_configure()
292 	return regmap_write(priv->regmap16, QEINT, qeint);  in ti_eqep_events_configure()
298 	switch (watch->event) {  in ti_eqep_watch_validate()
301 		if (watch->channel != 0)  in ti_eqep_watch_validate()
302 			return -EINVAL;  in ti_eqep_watch_validate()
306 		return -EINVAL;  in ti_eqep_watch_validate()
327 	regmap_read(priv->regmap32, QPOSMAX, &qposmax);  in ti_eqep_position_ceiling_read()
341 		return -ERANGE;  in ti_eqep_position_ceiling_write()
343 	regmap_write(priv->regmap32, QPOSMAX, ceiling);  in ti_eqep_position_ceiling_write()
354 	regmap_read(priv->regmap16, QEPCTL, &qepctl);  in ti_eqep_position_enable_read()
366 	regmap_write_bits(priv->regmap16, QEPCTL, QEPCTL_PHEN, enable ? -1 : 0);  in ti_eqep_position_enable_write()
434 	regmap_read(priv->regmap16, QFLG, &qflg);  in ti_eqep_irq_handler()
442 	regmap_write(priv->regmap16, QCLR, qflg);  in ti_eqep_irq_handler()
448 	.name = "32-bit",
456 	.name = "16-bit",
465 	struct device *dev = &pdev->dev;  in ti_eqep_probe()
474 		return -ENOMEM;  in ti_eqep_probe()
481 	priv->regmap32 = devm_regmap_init_mmio(dev, base,  in ti_eqep_probe()
483 	if (IS_ERR(priv->regmap32))  in ti_eqep_probe()
484 		return PTR_ERR(priv->regmap32);  in ti_eqep_probe()
486 	priv->regmap16 = devm_regmap_init_mmio(dev, base + 0x24,  in ti_eqep_probe()
488 	if (IS_ERR(priv->regmap16))  in ti_eqep_probe()
489 		return PTR_ERR(priv->regmap16);  in ti_eqep_probe()
500 	counter->name = dev_name(dev);  in ti_eqep_probe()
501 	counter->parent = dev;  in ti_eqep_probe()
502 	counter->ops = &ti_eqep_counter_ops;  in ti_eqep_probe()
503 	counter->counts = ti_eqep_counts;  in ti_eqep_probe()
504 	counter->num_counts = ARRAY_SIZE(ti_eqep_counts);  in ti_eqep_probe()
505 	counter->signals = ti_eqep_signals;  in ti_eqep_probe()
506 	counter->num_signals = ARRAY_SIZE(ti_eqep_signals);  in ti_eqep_probe()
535 	struct device *dev = &pdev->dev;  in ti_eqep_remove()
543 	{ .compatible = "ti,am3352-eqep", },
544 	{ .compatible = "ti,am62-eqep", },
553 		.name = "ti-eqep-cnt",
560 MODULE_DESCRIPTION("TI eQEP counter driver");