Lines Matching +full:valid +full:- +full:sources
1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
43 * ------------- -------------
45 * 0 PPI-X PPI-X1
46 * 1 PPI-Y PPI-X2
47 * 2 PPI-Z PPI-Y1
48 * 3 INTERRUPT PPI-Y2
49 * 4 CTR-Z1
50 * 5 CTR-Z2
57 * Port A - channels 0 to 7
58 * Port B - channels 8 to 15
59 * Port CL - channels 16 to 19
60 * Port CH - channels 20 to 23
64 * Each CTR is a 8254 chip providing 3 16-bit counter channels. Each
78 * specified in data[1] (this is a hardware-specific value). Not
79 * supported on PC214E. For the other boards, valid clock sources are
90 * 6. OUT n-1, the output of counter channel n-1 (see note 1 below).
95 * For the PCIe boards, clock sources in the range 0 to 31 are allowed
96 * and the following additional clock sources are defined:
104 * clock source in data[1]. For internal clock sources, data[2] is set
108 * specified in data[2] (this is a hardware-specific value). Not
109 * supported on PC214E. For the other boards, valid gate sources are 0
117 * 3. /OUT n-2, the inverted output of counter channel n-2 (see note
124 * For the PCIe boards, gate sources in the range 0 to 31 are allowed;
125 * the following additional clock sources and clock sources 6 and 7 are
130 * 7. OUT n-2, the non-inverted output of counter channel n-2
150 * 1. Clock source OUT n-1 is the output of the preceding channel on the
154 * 2. Gate source /OUT n-2 is the inverted output of channel 0 on the
161 * The 'TIMER' subdevice is a free-running 32-bit timer subdevice.
165 * channels matches the number of interrupt sources. The PC214E does not
166 * have an interrupt status register; see notes on 'INTERRUPT SOURCES'
169 * INTERRUPT SOURCES
172 * ------------- ------------- -------------
173 * Sources 6 6 6
174 * 0 PPI-X-C0 PPI-X-C0 PPI-X-C0
175 * 1 PPI-X-C3 PPI-X-C3 PPI-X-C3
176 * 2 PPI-Y-C0 PPI-Y-C0 unused
177 * 3 PPI-Y-C3 PPI-Y-C3 unused
178 * 4 CTR-Z1-OUT1 CTR-Z1-OUT1 CTR-Z1-OUT1
179 * 5 CTR-Z2-OUT1 CTR-Z2-OUT1 CTR-Z2-OUT1
182 * ------------- -------------
183 * Sources 6 6
184 * 0 PPI-X-C0 PPI-X1-C0
185 * 1 PPI-X-C3 PPI-X1-C3
186 * 2 PPI-Y-C0 PPI-Y1-C0
187 * 3 PPI-Y-C3 PPI-Y1-C3
188 * 4 PPI-Z-C0 CTR-Z1-OUT1
189 * 5 PPI-Z-C3 CTR-Z2-OUT1
196 * 6 least significant bits) goes from zero to non-zero, the board will
206 * 'INTERRUPT' subdevice. The channel list selects the interrupt sources
307 * This function does some special set-up for the PCIe boards
316 * The board uses Altera Cyclone IV with PCI-Express hard IP. in dio200_pcie_board_setup()
317 * The FPGA configuration has the PCI-Express Avalon-MM Bridge in dio200_pcie_board_setup()
321 * We need to write 0x80 to the "Avalon-MM to PCI-Express Interrupt in dio200_pcie_board_setup()
326 dev_err(dev->class_dev, "error! bad PCI region!\n"); in dio200_pcie_board_setup()
327 return -EINVAL; in dio200_pcie_board_setup()
331 dev_err(dev->class_dev, "error! failed to map registers!\n"); in dio200_pcie_board_setup()
332 return -ENOMEM; in dio200_pcie_board_setup()
352 return -EINVAL; in dio200_pci_auto_attach()
353 dev->board_ptr = board; in dio200_pci_auto_attach()
354 dev->board_name = board->name; in dio200_pci_auto_attach()
356 dev_info(dev->class_dev, "%s: attach pci %s (%s)\n", in dio200_pci_auto_attach()
357 dev->driver->driver_name, pci_name(pci_dev), dev->board_name); in dio200_pci_auto_attach()
363 bar = board->mainbar; in dio200_pci_auto_attach()
365 dev->mmio = pci_ioremap_bar(pci_dev, bar); in dio200_pci_auto_attach()
366 if (!dev->mmio) { in dio200_pci_auto_attach()
367 dev_err(dev->class_dev, in dio200_pci_auto_attach()
369 return -ENOMEM; in dio200_pci_auto_attach()
372 dev->iobase = pci_resource_start(pci_dev, bar); in dio200_pci_auto_attach()
374 dev_err(dev->class_dev, in dio200_pci_auto_attach()
376 return -ENXIO; in dio200_pci_auto_attach()
379 if (board->is_pcie) { in dio200_pci_auto_attach()
385 return amplc_dio200_common_attach(dev, pci_dev->irq, IRQF_SHARED); in dio200_pci_auto_attach()
411 id->driver_data); in dio200_pci_probe()