Lines Matching +full:valid +full:- +full:sources
1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
37 * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
49 * Periods of the internal clock sources in nanoseconds.
58 /* clock sources 12 and later reserved for enhanced boards */
69 * Periods of the timestamp timer clock sources in nanoseconds.
94 if (dev->mmio) in dio200___read8()
95 return readb(dev->mmio + offset); in dio200___read8()
96 return inb(dev->iobase + offset); in dio200___read8()
102 if (dev->mmio) in dio200___write8()
103 writeb(val, dev->mmio + offset); in dio200___write8()
105 outb(val, dev->iobase + offset); in dio200___write8()
111 if (dev->mmio) in dio200___read32()
112 return readl(dev->mmio + offset); in dio200___read32()
113 return inl(dev->iobase + offset); in dio200___read32()
119 if (dev->mmio) in dio200___write32()
120 writel(val, dev->mmio + offset); in dio200___write32()
122 outl(val, dev->iobase + offset); in dio200___write32()
130 return readb(dev->mmio + offset); in dio200___read8()
136 writeb(val, dev->mmio + offset); in dio200___write8()
142 return readl(dev->mmio + offset); in dio200___read32()
148 writel(val, dev->mmio + offset); in dio200___write32()
156 const struct dio200_board *board = dev->board_ptr; in dio200_read8()
158 if (board->is_pcie) in dio200_read8()
167 const struct dio200_board *board = dev->board_ptr; in dio200_write8()
169 if (board->is_pcie) in dio200_write8()
178 const struct dio200_board *board = dev->board_ptr; in dio200_read32()
180 if (board->is_pcie) in dio200_read32()
189 const struct dio200_board *board = dev->board_ptr; in dio200_write32()
191 if (board->is_pcie) in dio200_write32()
200 const struct dio200_board *board = dev->board_ptr; in dio200_subdev_8254_offset()
201 struct comedi_8254 *i8254 = s->private; in dio200_subdev_8254_offset()
205 if (dev->mmio) in dio200_subdev_8254_offset()
206 offset = (void __iomem *)i8254->context - dev->mmio; in dio200_subdev_8254_offset()
208 offset = i8254->context - dev->iobase; in dio200_subdev_8254_offset()
211 if (board->is_pcie) in dio200_subdev_8254_offset()
223 const struct dio200_board *board = dev->board_ptr; in dio200_subdev_intr_insn_bits()
224 struct dio200_subdev_intr *subpriv = s->private; in dio200_subdev_intr_insn_bits()
226 if (board->has_int_sce) { in dio200_subdev_intr_insn_bits()
228 data[1] = dio200_read8(dev, subpriv->ofs) & subpriv->valid_isns; in dio200_subdev_intr_insn_bits()
234 return insn->n; in dio200_subdev_intr_insn_bits()
240 const struct dio200_board *board = dev->board_ptr; in dio200_stop_intr()
241 struct dio200_subdev_intr *subpriv = s->private; in dio200_stop_intr()
243 subpriv->active = false; in dio200_stop_intr()
244 subpriv->enabled_isns = 0; in dio200_stop_intr()
245 if (board->has_int_sce) in dio200_stop_intr()
246 dio200_write8(dev, subpriv->ofs, 0); in dio200_stop_intr()
252 const struct dio200_board *board = dev->board_ptr; in dio200_start_intr()
253 struct dio200_subdev_intr *subpriv = s->private; in dio200_start_intr()
254 struct comedi_cmd *cmd = &s->async->cmd; in dio200_start_intr()
258 /* Determine interrupt sources to enable. */ in dio200_start_intr()
260 if (cmd->chanlist) { in dio200_start_intr()
261 for (n = 0; n < cmd->chanlist_len; n++) in dio200_start_intr()
262 isn_bits |= (1U << CR_CHAN(cmd->chanlist[n])); in dio200_start_intr()
264 isn_bits &= subpriv->valid_isns; in dio200_start_intr()
265 /* Enable interrupt sources. */ in dio200_start_intr()
266 subpriv->enabled_isns = isn_bits; in dio200_start_intr()
267 if (board->has_int_sce) in dio200_start_intr()
268 dio200_write8(dev, subpriv->ofs, isn_bits); in dio200_start_intr()
275 struct dio200_subdev_intr *subpriv = s->private; in dio200_inttrig_start_intr()
276 struct comedi_cmd *cmd = &s->async->cmd; in dio200_inttrig_start_intr()
279 if (trig_num != cmd->start_arg) in dio200_inttrig_start_intr()
280 return -EINVAL; in dio200_inttrig_start_intr()
282 spin_lock_irqsave(&subpriv->spinlock, flags); in dio200_inttrig_start_intr()
283 s->async->inttrig = NULL; in dio200_inttrig_start_intr()
284 if (subpriv->active) in dio200_inttrig_start_intr()
287 spin_unlock_irqrestore(&subpriv->spinlock, flags); in dio200_inttrig_start_intr()
296 struct comedi_cmd *cmd = &s->async->cmd; in dio200_read_scan_intr()
301 for (n = 0; n < cmd->chanlist_len; n++) { in dio200_read_scan_intr()
302 ch = CR_CHAN(cmd->chanlist[n]); in dio200_read_scan_intr()
309 if (cmd->stop_src == TRIG_COUNT && in dio200_read_scan_intr()
310 s->async->scans_done >= cmd->stop_arg) in dio200_read_scan_intr()
311 s->async->events |= COMEDI_CB_EOA; in dio200_read_scan_intr()
317 const struct dio200_board *board = dev->board_ptr; in dio200_handle_read_intr()
318 struct dio200_subdev_intr *subpriv = s->private; in dio200_handle_read_intr()
326 spin_lock_irqsave(&subpriv->spinlock, flags); in dio200_handle_read_intr()
327 if (board->has_int_sce) { in dio200_handle_read_intr()
329 * Collect interrupt sources that have triggered and disable in dio200_handle_read_intr()
331 * sources have triggered, at which point, the valid part of in dio200_handle_read_intr()
335 * Mask off interrupt sources already seen to avoid infinite in dio200_handle_read_intr()
338 cur_enabled = subpriv->enabled_isns; in dio200_handle_read_intr()
339 while ((intstat = (dio200_read8(dev, subpriv->ofs) & in dio200_handle_read_intr()
340 subpriv->valid_isns & ~triggered)) != 0) { in dio200_handle_read_intr()
343 dio200_write8(dev, subpriv->ofs, cur_enabled); in dio200_handle_read_intr()
350 triggered = subpriv->enabled_isns; in dio200_handle_read_intr()
355 * Some interrupt sources have triggered and have been in dio200_handle_read_intr()
360 cur_enabled = subpriv->enabled_isns; in dio200_handle_read_intr()
361 if (board->has_int_sce) in dio200_handle_read_intr()
362 dio200_write8(dev, subpriv->ofs, cur_enabled); in dio200_handle_read_intr()
364 if (subpriv->active) { in dio200_handle_read_intr()
368 * Ignore interrupt sources that the command isn't in dio200_handle_read_intr()
372 if (triggered & subpriv->enabled_isns) { in dio200_handle_read_intr()
378 spin_unlock_irqrestore(&subpriv->spinlock, flags); in dio200_handle_read_intr()
388 struct dio200_subdev_intr *subpriv = s->private; in dio200_subdev_intr_cancel()
391 spin_lock_irqsave(&subpriv->spinlock, flags); in dio200_subdev_intr_cancel()
392 if (subpriv->active) in dio200_subdev_intr_cancel()
395 spin_unlock_irqrestore(&subpriv->spinlock, flags); in dio200_subdev_intr_cancel()
406 /* Step 1 : check if triggers are trivially valid */ in dio200_subdev_intr_cmdtest()
408 err |= comedi_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT); in dio200_subdev_intr_cmdtest()
409 err |= comedi_check_trigger_src(&cmd->scan_begin_src, TRIG_EXT); in dio200_subdev_intr_cmdtest()
410 err |= comedi_check_trigger_src(&cmd->convert_src, TRIG_NOW); in dio200_subdev_intr_cmdtest()
411 err |= comedi_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT); in dio200_subdev_intr_cmdtest()
412 err |= comedi_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE); in dio200_subdev_intr_cmdtest()
417 /* Step 2a : make sure trigger sources are unique */ in dio200_subdev_intr_cmdtest()
419 err |= comedi_check_trigger_is_unique(cmd->start_src); in dio200_subdev_intr_cmdtest()
420 err |= comedi_check_trigger_is_unique(cmd->stop_src); in dio200_subdev_intr_cmdtest()
427 /* Step 3: check if arguments are trivially valid */ in dio200_subdev_intr_cmdtest()
429 err |= comedi_check_trigger_arg_is(&cmd->start_arg, 0); in dio200_subdev_intr_cmdtest()
430 err |= comedi_check_trigger_arg_is(&cmd->scan_begin_arg, 0); in dio200_subdev_intr_cmdtest()
431 err |= comedi_check_trigger_arg_is(&cmd->convert_arg, 0); in dio200_subdev_intr_cmdtest()
432 err |= comedi_check_trigger_arg_is(&cmd->scan_end_arg, in dio200_subdev_intr_cmdtest()
433 cmd->chanlist_len); in dio200_subdev_intr_cmdtest()
435 if (cmd->stop_src == TRIG_COUNT) in dio200_subdev_intr_cmdtest()
436 err |= comedi_check_trigger_arg_min(&cmd->stop_arg, 1); in dio200_subdev_intr_cmdtest()
438 err |= comedi_check_trigger_arg_is(&cmd->stop_arg, 0); in dio200_subdev_intr_cmdtest()
453 struct comedi_cmd *cmd = &s->async->cmd; in dio200_subdev_intr_cmd()
454 struct dio200_subdev_intr *subpriv = s->private; in dio200_subdev_intr_cmd()
457 spin_lock_irqsave(&subpriv->spinlock, flags); in dio200_subdev_intr_cmd()
459 subpriv->active = true; in dio200_subdev_intr_cmd()
461 if (cmd->start_src == TRIG_INT) in dio200_subdev_intr_cmd()
462 s->async->inttrig = dio200_inttrig_start_intr; in dio200_subdev_intr_cmd()
466 spin_unlock_irqrestore(&subpriv->spinlock, flags); in dio200_subdev_intr_cmd()
476 const struct dio200_board *board = dev->board_ptr; in dio200_subdev_intr_init()
481 return -ENOMEM; in dio200_subdev_intr_init()
483 subpriv->ofs = offset; in dio200_subdev_intr_init()
484 subpriv->valid_isns = valid_isns; in dio200_subdev_intr_init()
485 spin_lock_init(&subpriv->spinlock); in dio200_subdev_intr_init()
487 if (board->has_int_sce) in dio200_subdev_intr_init()
488 /* Disable interrupt sources. */ in dio200_subdev_intr_init()
489 dio200_write8(dev, subpriv->ofs, 0); in dio200_subdev_intr_init()
491 s->type = COMEDI_SUBD_DI; in dio200_subdev_intr_init()
492 s->subdev_flags = SDF_READABLE | SDF_CMD_READ | SDF_PACKED; in dio200_subdev_intr_init()
493 if (board->has_int_sce) { in dio200_subdev_intr_init()
494 s->n_chan = DIO200_MAX_ISNS; in dio200_subdev_intr_init()
495 s->len_chanlist = DIO200_MAX_ISNS; in dio200_subdev_intr_init()
498 s->n_chan = 1; in dio200_subdev_intr_init()
499 s->len_chanlist = 1; in dio200_subdev_intr_init()
501 s->range_table = &range_digital; in dio200_subdev_intr_init()
502 s->maxdata = 1; in dio200_subdev_intr_init()
503 s->insn_bits = dio200_subdev_intr_insn_bits; in dio200_subdev_intr_init()
504 s->do_cmdtest = dio200_subdev_intr_cmdtest; in dio200_subdev_intr_init()
505 s->do_cmd = dio200_subdev_intr_cmd; in dio200_subdev_intr_init()
506 s->cancel = dio200_subdev_intr_cancel; in dio200_subdev_intr_init()
514 struct comedi_subdevice *s = dev->read_subdev; in dio200_interrupt()
517 if (!dev->attached) in dio200_interrupt()
552 const struct dio200_board *board = dev->board_ptr; in dio200_subdev_8254_config()
553 struct comedi_8254 *i8254 = s->private; in dio200_subdev_8254_config()
554 unsigned int chan = CR_CHAN(insn->chanspec); in dio200_subdev_8254_config()
555 unsigned int max_src = board->is_pcie ? 31 : 7; in dio200_subdev_8254_config()
558 if (!board->has_clk_gat_sce) in dio200_subdev_8254_config()
559 return -EINVAL; in dio200_subdev_8254_config()
565 return -EINVAL; in dio200_subdev_8254_config()
568 i8254->gate_src[chan] = src; in dio200_subdev_8254_config()
571 data[2] = i8254->gate_src[chan]; in dio200_subdev_8254_config()
576 return -EINVAL; in dio200_subdev_8254_config()
579 i8254->clock_src[chan] = src; in dio200_subdev_8254_config()
582 data[1] = i8254->clock_src[chan]; in dio200_subdev_8254_config()
583 data[2] = clock_period[i8254->clock_src[chan]]; in dio200_subdev_8254_config()
586 return -EINVAL; in dio200_subdev_8254_config()
589 return insn->n; in dio200_subdev_8254_config()
596 const struct dio200_board *board = dev->board_ptr; in dio200_subdev_8254_init()
605 if (board->is_pcie) { in dio200_subdev_8254_init()
612 if (dev->mmio) { in dio200_subdev_8254_init()
613 i8254 = comedi_8254_mm_alloc(dev->mmio + offset, in dio200_subdev_8254_init()
616 i8254 = comedi_8254_io_alloc(dev->iobase + offset, in dio200_subdev_8254_init()
624 i8254->insn_config = dio200_subdev_8254_config; in dio200_subdev_8254_init()
628 * use dev->pacer to save the i8254 pointer. Instead, in dio200_subdev_8254_init()
630 * s->private. Mark the subdevice as having private data in dio200_subdev_8254_init()
636 if (board->has_clk_gat_sce) { in dio200_subdev_8254_init()
651 struct dio200_subdev_8255 *subpriv = s->private; in dio200_subdev_8255_set_dir()
656 if (!(s->io_bits & 0x0000ff)) in dio200_subdev_8255_set_dir()
658 if (!(s->io_bits & 0x00ff00)) in dio200_subdev_8255_set_dir()
660 if (!(s->io_bits & 0x0f0000)) in dio200_subdev_8255_set_dir()
662 if (!(s->io_bits & 0xf00000)) in dio200_subdev_8255_set_dir()
664 dio200_write8(dev, subpriv->ofs + I8255_CTRL_REG, config); in dio200_subdev_8255_set_dir()
672 struct dio200_subdev_8255 *subpriv = s->private; in dio200_subdev_8255_bits()
679 dio200_write8(dev, subpriv->ofs + I8255_DATA_A_REG, in dio200_subdev_8255_bits()
680 s->state & 0xff); in dio200_subdev_8255_bits()
683 dio200_write8(dev, subpriv->ofs + I8255_DATA_B_REG, in dio200_subdev_8255_bits()
684 (s->state >> 8) & 0xff); in dio200_subdev_8255_bits()
687 dio200_write8(dev, subpriv->ofs + I8255_DATA_C_REG, in dio200_subdev_8255_bits()
688 (s->state >> 16) & 0xff); in dio200_subdev_8255_bits()
692 val = dio200_read8(dev, subpriv->ofs + I8255_DATA_A_REG); in dio200_subdev_8255_bits()
693 val |= dio200_read8(dev, subpriv->ofs + I8255_DATA_B_REG) << 8; in dio200_subdev_8255_bits()
694 val |= dio200_read8(dev, subpriv->ofs + I8255_DATA_C_REG) << 16; in dio200_subdev_8255_bits()
698 return insn->n; in dio200_subdev_8255_bits()
706 unsigned int chan = CR_CHAN(insn->chanspec); in dio200_subdev_8255_config()
725 return insn->n; in dio200_subdev_8255_config()
736 return -ENOMEM; in dio200_subdev_8255_init()
738 subpriv->ofs = offset; in dio200_subdev_8255_init()
740 s->type = COMEDI_SUBD_DIO; in dio200_subdev_8255_init()
741 s->subdev_flags = SDF_READABLE | SDF_WRITABLE; in dio200_subdev_8255_init()
742 s->n_chan = 24; in dio200_subdev_8255_init()
743 s->range_table = &range_digital; in dio200_subdev_8255_init()
744 s->maxdata = 1; in dio200_subdev_8255_init()
745 s->insn_bits = dio200_subdev_8255_bits; in dio200_subdev_8255_init()
746 s->insn_config = dio200_subdev_8255_config; in dio200_subdev_8255_init()
758 for (n = 0; n < insn->n; n++) in dio200_subdev_timer_read()
791 return -EINVAL; in dio200_subdev_timer_set_clock_src()
810 ret = -EINVAL; in dio200_subdev_timer_config()
816 ret = -EINVAL; in dio200_subdev_timer_config()
819 return ret < 0 ? ret : insn->n; in dio200_subdev_timer_config()
831 const struct dio200_board *board = dev->board_ptr; in amplc_dio200_common_attach()
836 if (!IS_ENABLED(CONFIG_HAS_IOPORT) && !dev->mmio) { in amplc_dio200_common_attach()
837 dev_err(dev->class_dev, in amplc_dio200_common_attach()
839 return -ENXIO; in amplc_dio200_common_attach()
842 ret = comedi_alloc_subdevices(dev, board->n_subdevs); in amplc_dio200_common_attach()
846 for (n = 0; n < dev->n_subdevices; n++) { in amplc_dio200_common_attach()
847 s = &dev->subdevices[n]; in amplc_dio200_common_attach()
848 switch (board->sdtype[n]) { in amplc_dio200_common_attach()
852 board->sdinfo[n]); in amplc_dio200_common_attach()
859 board->sdinfo[n]); in amplc_dio200_common_attach()
865 if (irq && !dev->read_subdev) { in amplc_dio200_common_attach()
868 board->sdinfo[n]); in amplc_dio200_common_attach()
871 dev->read_subdev = s; in amplc_dio200_common_attach()
873 s->type = COMEDI_SUBD_UNUSED; in amplc_dio200_common_attach()
877 s->type = COMEDI_SUBD_TIMER; in amplc_dio200_common_attach()
878 s->subdev_flags = SDF_READABLE | SDF_LSAMPL; in amplc_dio200_common_attach()
879 s->n_chan = 1; in amplc_dio200_common_attach()
880 s->maxdata = 0xffffffff; in amplc_dio200_common_attach()
881 s->insn_read = dio200_subdev_timer_read; in amplc_dio200_common_attach()
882 s->insn_config = dio200_subdev_timer_config; in amplc_dio200_common_attach()
885 s->type = COMEDI_SUBD_UNUSED; in amplc_dio200_common_attach()
890 if (irq && dev->read_subdev) { in amplc_dio200_common_attach()
892 dev->board_name, dev) >= 0) { in amplc_dio200_common_attach()
893 dev->irq = irq; in amplc_dio200_common_attach()
895 dev_warn(dev->class_dev, in amplc_dio200_common_attach()