Lines Matching +full:0 +full:xa9c
35 * testing", so it's not modelled and then force to 0.
37 #define SUN50I_H616_PLL_CPUX_REG 0x000
43 .reg = 0x000,
51 #define SUN50I_H616_PLL_DDR0_REG 0x010
57 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
59 .reg = 0x010,
66 #define SUN50I_H616_PLL_DDR1_REG 0x018
72 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
74 .reg = 0x018,
81 #define SUN50I_H616_PLL_PERIPH0_REG 0x020
87 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
90 .reg = 0x020,
98 #define SUN50I_H616_PLL_PERIPH1_REG 0x028
104 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
107 .reg = 0x028,
115 #define SUN50I_H616_PLL_GPU_REG 0x030
121 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
123 .reg = 0x030,
132 * in the user manual. So it's not modelled and forced to 0.
134 #define SUN50I_H616_PLL_VIDEO0_REG 0x040
144 .reg = 0x040,
152 #define SUN50I_H616_PLL_VIDEO1_REG 0x048
162 .reg = 0x048,
170 #define SUN50I_H616_PLL_VIDEO2_REG 0x050
180 .reg = 0x050,
188 #define SUN50I_H616_PLL_VE_REG 0x058
194 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
196 .reg = 0x058,
203 #define SUN50I_H616_PLL_DE_REG 0x060
209 .p = _SUNXI_CCU_DIV(0, 1), /* output divider */
211 .reg = 0x060,
226 { .rate = 90316800, .pattern = 0xc001288d, .m = 3, .n = 22 },
227 { .rate = 98304000, .pattern = 0xc001eb85, .m = 5, .n = 40 },
230 #define SUN50I_H616_PLL_AUDIO_REG 0x078
237 BIT(24), 0x178, BIT(31)),
242 .reg = 0x078,
252 0x500, 24, 3, CLK_SET_RATE_PARENT | CLK_IS_CRITICAL);
253 static SUNXI_CCU_M(axi_clk, "axi", "cpux", 0x500, 0, 2, 0);
254 static SUNXI_CCU_M(cpux_apb_clk, "cpux-apb", "cpux", 0x500, 8, 2, 0);
260 0x510,
261 0, 2, /* M */
264 0);
269 static SUNXI_CCU_MP_WITH_MUX(ahb3_clk, "ahb3", ahb3_apb1_apb2_parents, 0x51c,
270 0, 2, /* M */
273 0);
275 static SUNXI_CCU_MP_WITH_MUX(apb1_clk, "apb1", ahb3_apb1_apb2_parents, 0x520,
276 0, 2, /* M */
279 0);
281 static SUNXI_CCU_MP_WITH_MUX(apb2_clk, "apb2", ahb3_apb1_apb2_parents, 0x524,
282 0, 2, /* M */
285 0);
289 static SUNXI_CCU_M_WITH_MUX_GATE(mbus_clk, "mbus", mbus_parents, 0x540,
290 0, 3, /* M */
296 static SUNXI_CCU_M_WITH_MUX_GATE(de_clk, "de", de_parents, 0x600,
297 0, 4, /* M */
303 0x60c, BIT(0), 0);
307 0x620,
308 0, 4, /* M */
311 0);
314 0x62c, BIT(0), 0);
316 static SUNXI_CCU_M_WITH_MUX_GATE(g2d_clk, "g2d", de_parents, 0x630,
317 0, 4, /* M */
320 0);
323 0x63c, BIT(0), 0);
326 static SUNXI_CCU_M_WITH_MUX_GATE(gpu0_clk, "gpu0", gpu0_parents, 0x670,
327 0, 2, /* M */
331 static SUNXI_CCU_M_WITH_GATE(gpu1_clk, "gpu1", "pll-periph0-2x", 0x674,
332 0, 2, /* M */
334 0);
337 0x67c, BIT(0), 0);
340 static SUNXI_CCU_MP_WITH_MUX_GATE(ce_clk, "ce", ce_parents, 0x680,
341 0, 4, /* M */
345 0);
348 0x68c, BIT(0), 0);
351 static SUNXI_CCU_M_WITH_MUX_GATE(ve_clk, "ve", ve_parents, 0x690,
352 0, 3, /* M */
358 0x69c, BIT(0), 0);
361 0x70c, BIT(0), 0);
364 0x73c, BIT(0), 0);
366 static SUNXI_CCU_GATE(avs_clk, "avs", "osc24M", 0x740, BIT(31), 0);
369 0x78c, BIT(0), 0);
372 0x79c, BIT(0), 0);
374 static SUNXI_CCU_GATE(bus_pwm_clk, "bus-pwm", "apb1", 0x7ac, BIT(0), 0);
376 static SUNXI_CCU_GATE(bus_iommu_clk, "bus-iommu", "apb1", 0x7bc, BIT(0), 0);
380 .div = _SUNXI_CCU_DIV(0, 2),
383 .reg = 0x800,
392 0x804, BIT(0), 0);
394 0x804, BIT(1), 0);
396 0x804, BIT(2), 0);
398 0x804, BIT(3), 0);
400 0x804, BIT(5), 0);
402 0x804, BIT(10), 0);
405 0x80c, BIT(0), CLK_IS_CRITICAL);
410 static SUNXI_CCU_MP_WITH_MUX_GATE(nand0_clk, "nand0", nand_spi_parents, 0x810,
411 0, 4, /* M */
415 0);
417 static SUNXI_CCU_MP_WITH_MUX_GATE(nand1_clk, "nand1", nand_spi_parents, 0x814,
418 0, 4, /* M */
422 0);
424 static SUNXI_CCU_GATE(bus_nand_clk, "bus-nand", "ahb3", 0x82c, BIT(0), 0);
428 static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mmc0", mmc_parents, 0x830,
429 0, 4, /* M */
434 0);
436 static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
437 0, 4, /* M */
442 0);
444 static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
445 0, 4, /* M */
450 0);
452 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0);
453 static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0);
454 static SUNXI_CCU_GATE(bus_mmc2_clk, "bus-mmc2", "ahb3", 0x84c, BIT(2), 0);
456 static SUNXI_CCU_GATE(bus_uart0_clk, "bus-uart0", "apb2", 0x90c, BIT(0), 0);
457 static SUNXI_CCU_GATE(bus_uart1_clk, "bus-uart1", "apb2", 0x90c, BIT(1), 0);
458 static SUNXI_CCU_GATE(bus_uart2_clk, "bus-uart2", "apb2", 0x90c, BIT(2), 0);
459 static SUNXI_CCU_GATE(bus_uart3_clk, "bus-uart3", "apb2", 0x90c, BIT(3), 0);
460 static SUNXI_CCU_GATE(bus_uart4_clk, "bus-uart4", "apb2", 0x90c, BIT(4), 0);
461 static SUNXI_CCU_GATE(bus_uart5_clk, "bus-uart5", "apb2", 0x90c, BIT(5), 0);
463 static SUNXI_CCU_GATE(bus_i2c0_clk, "bus-i2c0", "apb2", 0x91c, BIT(0), 0);
464 static SUNXI_CCU_GATE(bus_i2c1_clk, "bus-i2c1", "apb2", 0x91c, BIT(1), 0);
465 static SUNXI_CCU_GATE(bus_i2c2_clk, "bus-i2c2", "apb2", 0x91c, BIT(2), 0);
466 static SUNXI_CCU_GATE(bus_i2c3_clk, "bus-i2c3", "apb2", 0x91c, BIT(3), 0);
467 static SUNXI_CCU_GATE(bus_i2c4_clk, "bus-i2c4", "apb2", 0x91c, BIT(4), 0);
469 static SUNXI_CCU_MP_WITH_MUX_GATE(spi0_clk, "spi0", nand_spi_parents, 0x940,
470 0, 4, /* M */
474 0);
476 static SUNXI_CCU_MP_WITH_MUX_GATE(spi1_clk, "spi1", nand_spi_parents, 0x944,
477 0, 4, /* M */
481 0);
483 static SUNXI_CCU_GATE(bus_spi0_clk, "bus-spi0", "ahb3", 0x96c, BIT(0), 0);
484 static SUNXI_CCU_GATE(bus_spi1_clk, "bus-spi1", "ahb3", 0x96c, BIT(1), 0);
486 static SUNXI_CCU_GATE(emac_25m_clk, "emac-25m", "ahb3", 0x970,
487 BIT(31) | BIT(30), 0);
489 static SUNXI_CCU_GATE(bus_emac0_clk, "bus-emac0", "ahb3", 0x97c, BIT(0), 0);
490 static SUNXI_CCU_GATE(bus_emac1_clk, "bus-emac1", "ahb3", 0x97c, BIT(1), 0);
493 static SUNXI_CCU_MP_WITH_MUX_GATE(ts_clk, "ts", ts_parents, 0x9b0,
494 0, 4, /* M */
498 0);
500 static SUNXI_CCU_GATE(bus_ts_clk, "bus-ts", "ahb3", 0x9bc, BIT(0), 0);
502 static SUNXI_CCU_GATE(bus_gpadc_clk, "bus-gpadc", "apb1", 0x9ec, BIT(0), 0);
504 static SUNXI_CCU_GATE(bus_ths_clk, "bus-ths", "apb1", 0x9fc, BIT(0), 0);
513 .reg = 0xa20,
517 0),
521 static SUNXI_CCU_GATE(bus_spdif_clk, "bus-spdif", "apb1", 0xa2c, BIT(0), 0);
528 .reg = 0xa40,
532 0),
536 static SUNXI_CCU_GATE(bus_dmic_clk, "bus-dmic", "apb1", 0xa4c, BIT(0), 0);
539 audio_parents, 0xa50,
540 0, 4, /* M */
545 audio_parents, 0xa54,
546 0, 4, /* M */
551 static SUNXI_CCU_GATE(bus_audio_codec_clk, "bus-audio-codec", "apb1", 0xa5c,
552 BIT(0), 0);
559 .reg = 0xa60,
563 0),
567 static SUNXI_CCU_GATE(bus_audio_hub_clk, "bus-audio-hub", "apb1", 0xa6c, BIT(0), 0);
571 * We will force them to 0 (12M divided from 48M).
573 #define SUN50I_H616_USB0_CLK_REG 0xa70
574 #define SUN50I_H616_USB1_CLK_REG 0xa74
575 #define SUN50I_H616_USB2_CLK_REG 0xa78
576 #define SUN50I_H616_USB3_CLK_REG 0xa7c
578 static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc12M", 0xa70, BIT(31), 0);
579 static SUNXI_CCU_GATE(usb_phy0_clk, "usb-phy0", "osc24M", 0xa70, BIT(29), 0);
581 static SUNXI_CCU_GATE(usb_ohci1_clk, "usb-ohci1", "osc12M", 0xa74, BIT(31), 0);
582 static SUNXI_CCU_GATE(usb_phy1_clk, "usb-phy1", "osc24M", 0xa74, BIT(29), 0);
584 static SUNXI_CCU_GATE(usb_ohci2_clk, "usb-ohci2", "osc12M", 0xa78, BIT(31), 0);
585 static SUNXI_CCU_GATE(usb_phy2_clk, "usb-phy2", "osc24M", 0xa78, BIT(29), 0);
587 static SUNXI_CCU_GATE(usb_ohci3_clk, "usb-ohci3", "osc12M", 0xa7c, BIT(31), 0);
588 static SUNXI_CCU_GATE(usb_phy3_clk, "usb-phy3", "osc24M", 0xa7c, BIT(29), 0);
590 static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb3", 0xa8c, BIT(0), 0);
591 static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "ahb3", 0xa8c, BIT(1), 0);
592 static SUNXI_CCU_GATE(bus_ohci2_clk, "bus-ohci2", "ahb3", 0xa8c, BIT(2), 0);
593 static SUNXI_CCU_GATE(bus_ohci3_clk, "bus-ohci3", "ahb3", 0xa8c, BIT(3), 0);
594 static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb3", 0xa8c, BIT(4), 0);
595 static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb3", 0xa8c, BIT(5), 0);
596 static SUNXI_CCU_GATE(bus_ehci2_clk, "bus-ehci2", "ahb3", 0xa8c, BIT(6), 0);
597 static SUNXI_CCU_GATE(bus_ehci3_clk, "bus-ehci3", "ahb3", 0xa8c, BIT(7), 0);
598 static SUNXI_CCU_GATE(bus_otg_clk, "bus-otg", "ahb3", 0xa8c, BIT(8), 0);
600 static SUNXI_CCU_GATE(bus_keyadc_clk, "bus-keyadc", "apb1", 0xa9c, BIT(0), 0);
604 static SUNXI_CCU_M_WITH_MUX_GATE(hdmi_clk, "hdmi", hdmi_parents, 0xb00,
605 0, 4, /* M */
608 0);
610 static SUNXI_CCU_GATE(hdmi_slow_clk, "hdmi-slow", "osc24M", 0xb04, BIT(31), 0);
617 #define SUN50I_H616_HDMI_CEC_CLK_REG 0xb10
630 .reg = 0xb10,
635 0),
639 static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "ahb3", 0xb1c, BIT(0), 0);
642 0xb5c, BIT(0), 0);
649 tcon_tv_parents, 0xb80,
650 0, 4, /* M */
656 tcon_tv_parents, 0xb84,
657 0, 4, /* M */
664 0xb9c, BIT(0), 0);
666 0xb9c, BIT(1), 0);
669 tcon_tv_parents, 0xbb0,
670 0, 4, /* M */
677 0xbbc, BIT(0), 0);
679 0xbbc, BIT(1), 0);
682 static SUNXI_CCU_M_WITH_MUX_GATE(hdcp_clk, "hdcp", hdcp_parents, 0xc40,
683 0, 4, /* M */
686 0);
688 static SUNXI_CCU_GATE(bus_hdcp_clk, "bus-hdcp", "ahb3", 0xc4c, BIT(0), 0);
691 static CLK_FIXED_FACTOR_FW_NAME(osc12M_clk, "osc12M", "hosc", 2, 1, 0);
719 1, 2, 0);
726 pll_periph0_2x_hws, 36621, 1, 0);
734 1, 2, 0);
1006 [RST_MBUS] = { 0x540, BIT(30) },
1008 [RST_BUS_DE] = { 0x60c, BIT(16) },
1009 [RST_BUS_DEINTERLACE] = { 0x62c, BIT(16) },
1010 [RST_BUS_GPU] = { 0x67c, BIT(16) },
1011 [RST_BUS_CE] = { 0x68c, BIT(16) },
1012 [RST_BUS_VE] = { 0x69c, BIT(16) },
1013 [RST_BUS_DMA] = { 0x70c, BIT(16) },
1014 [RST_BUS_HSTIMER] = { 0x73c, BIT(16) },
1015 [RST_BUS_DBG] = { 0x78c, BIT(16) },
1016 [RST_BUS_PSI] = { 0x79c, BIT(16) },
1017 [RST_BUS_PWM] = { 0x7ac, BIT(16) },
1018 [RST_BUS_IOMMU] = { 0x7bc, BIT(16) },
1019 [RST_BUS_DRAM] = { 0x80c, BIT(16) },
1020 [RST_BUS_NAND] = { 0x82c, BIT(16) },
1021 [RST_BUS_MMC0] = { 0x84c, BIT(16) },
1022 [RST_BUS_MMC1] = { 0x84c, BIT(17) },
1023 [RST_BUS_MMC2] = { 0x84c, BIT(18) },
1024 [RST_BUS_UART0] = { 0x90c, BIT(16) },
1025 [RST_BUS_UART1] = { 0x90c, BIT(17) },
1026 [RST_BUS_UART2] = { 0x90c, BIT(18) },
1027 [RST_BUS_UART3] = { 0x90c, BIT(19) },
1028 [RST_BUS_UART4] = { 0x90c, BIT(20) },
1029 [RST_BUS_UART5] = { 0x90c, BIT(21) },
1030 [RST_BUS_I2C0] = { 0x91c, BIT(16) },
1031 [RST_BUS_I2C1] = { 0x91c, BIT(17) },
1032 [RST_BUS_I2C2] = { 0x91c, BIT(18) },
1033 [RST_BUS_I2C3] = { 0x91c, BIT(19) },
1034 [RST_BUS_I2C4] = { 0x91c, BIT(20) },
1035 [RST_BUS_SPI0] = { 0x96c, BIT(16) },
1036 [RST_BUS_SPI1] = { 0x96c, BIT(17) },
1037 [RST_BUS_EMAC0] = { 0x97c, BIT(16) },
1038 [RST_BUS_EMAC1] = { 0x97c, BIT(17) },
1039 [RST_BUS_TS] = { 0x9bc, BIT(16) },
1040 [RST_BUS_GPADC] = { 0x9ec, BIT(16) },
1041 [RST_BUS_THS] = { 0x9fc, BIT(16) },
1042 [RST_BUS_SPDIF] = { 0xa2c, BIT(16) },
1043 [RST_BUS_DMIC] = { 0xa4c, BIT(16) },
1044 [RST_BUS_AUDIO_CODEC] = { 0xa5c, BIT(16) },
1045 [RST_BUS_AUDIO_HUB] = { 0xa6c, BIT(16) },
1047 [RST_USB_PHY0] = { 0xa70, BIT(30) },
1048 [RST_USB_PHY1] = { 0xa74, BIT(30) },
1049 [RST_USB_PHY2] = { 0xa78, BIT(30) },
1050 [RST_USB_PHY3] = { 0xa7c, BIT(30) },
1051 [RST_BUS_OHCI0] = { 0xa8c, BIT(16) },
1052 [RST_BUS_OHCI1] = { 0xa8c, BIT(17) },
1053 [RST_BUS_OHCI2] = { 0xa8c, BIT(18) },
1054 [RST_BUS_OHCI3] = { 0xa8c, BIT(19) },
1055 [RST_BUS_EHCI0] = { 0xa8c, BIT(20) },
1056 [RST_BUS_EHCI1] = { 0xa8c, BIT(21) },
1057 [RST_BUS_EHCI2] = { 0xa8c, BIT(22) },
1058 [RST_BUS_EHCI3] = { 0xa8c, BIT(23) },
1059 [RST_BUS_OTG] = { 0xa8c, BIT(24) },
1060 [RST_BUS_KEYADC] = { 0xa9c, BIT(16) },
1062 [RST_BUS_HDMI] = { 0xb1c, BIT(16) },
1063 [RST_BUS_HDMI_SUB] = { 0xb1c, BIT(17) },
1064 [RST_BUS_TCON_TOP] = { 0xb5c, BIT(16) },
1065 [RST_BUS_TCON_TV0] = { 0xb9c, BIT(16) },
1066 [RST_BUS_TCON_TV1] = { 0xb9c, BIT(17) },
1067 [RST_BUS_TVE_TOP] = { 0xbbc, BIT(16) },
1068 [RST_BUS_TVE0] = { 0xbbc, BIT(17) },
1069 [RST_BUS_HDCP] = { 0xc4c, BIT(16) },
1129 reg = devm_platform_ioremap_resource(pdev, 0); in sun50i_h616_ccu_probe()
1134 for (i = 0; i < ARRAY_SIZE(pll_regs); i++) { in sun50i_h616_ccu_probe()
1141 * Force the output divider of video PLLs to 0. in sun50i_h616_ccu_probe()
1145 for (i = 0; i < ARRAY_SIZE(pll_video_regs); i++) { in sun50i_h616_ccu_probe()
1147 val &= ~BIT(0); in sun50i_h616_ccu_probe()
1157 for (i = 0; i < ARRAY_SIZE(usb2_clk_regs); i++) { in sun50i_h616_ccu_probe()
1170 val |= BIT(0); in sun50i_h616_ccu_probe()
1193 return 0; in sun50i_h616_ccu_probe()