Lines Matching +full:jh7110 +full:- +full:crg
1 // SPDX-License-Identifier: GPL-2.0
3 * StarFive JH7110 Always-On Clock Driver
9 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/starfive,jh7110-crg.h>
15 #include "clk-starfive-jh7110.h"
63 priv = devm_kzalloc(&pdev->dev, in jh7110_aoncrg_probe()
67 return -ENOMEM; in jh7110_aoncrg_probe()
69 spin_lock_init(&priv->rmw_lock); in jh7110_aoncrg_probe()
70 priv->num_reg = JH7110_AONCLK_END; in jh7110_aoncrg_probe()
71 priv->dev = &pdev->dev; in jh7110_aoncrg_probe()
72 priv->base = devm_platform_ioremap_resource(pdev, 0); in jh7110_aoncrg_probe()
73 if (IS_ERR(priv->base)) in jh7110_aoncrg_probe()
74 return PTR_ERR(priv->base); in jh7110_aoncrg_probe()
87 struct jh71x0_clk *clk = &priv->reg[idx]; in jh7110_aoncrg_probe()
94 parents[i].hw = &priv->reg[pidx].hw; in jh7110_aoncrg_probe()
111 clk->hw.init = &init; in jh7110_aoncrg_probe()
112 clk->idx = idx; in jh7110_aoncrg_probe()
113 clk->max_div = max & JH71X0_CLK_DIV_MASK; in jh7110_aoncrg_probe()
115 ret = devm_clk_hw_register(&pdev->dev, &clk->hw); in jh7110_aoncrg_probe()
120 ret = devm_of_clk_add_hw_provider(&pdev->dev, jh71x0_clk_get, priv); in jh7110_aoncrg_probe()
124 return jh7110_reset_controller_register(priv, "rst-aon", 1); in jh7110_aoncrg_probe()
128 { .compatible = "starfive,jh7110-aoncrg" },
136 .name = "clk-starfive-jh7110-aon",
143 MODULE_DESCRIPTION("StarFive JH7110 always-on clock driver");