Lines Matching full:13
50 RK3576_CRU_RESET_OFFSET(SRST_H_SAI0_8CH, 7, 13),
86 RK3576_CRU_RESET_OFFSET(SRST_P_VCCIO_IOC, 11, 13),
104 RK3576_CRU_RESET_OFFSET(SRST_I2C2, 12, 13),
109 RK3576_CRU_RESET_OFFSET(SRST_I2C5, 13, 0),
110 RK3576_CRU_RESET_OFFSET(SRST_I2C6, 13, 1),
111 RK3576_CRU_RESET_OFFSET(SRST_I2C7, 13, 2),
112 RK3576_CRU_RESET_OFFSET(SRST_I2C8, 13, 3),
113 RK3576_CRU_RESET_OFFSET(SRST_I2C9, 13, 4),
114 RK3576_CRU_RESET_OFFSET(SRST_P_SARADC, 13, 6),
115 RK3576_CRU_RESET_OFFSET(SRST_SARADC, 13, 7),
116 RK3576_CRU_RESET_OFFSET(SRST_P_TSADC, 13, 8),
117 RK3576_CRU_RESET_OFFSET(SRST_TSADC, 13, 9),
118 RK3576_CRU_RESET_OFFSET(SRST_P_UART0, 13, 10),
119 RK3576_CRU_RESET_OFFSET(SRST_P_UART2, 13, 11),
120 RK3576_CRU_RESET_OFFSET(SRST_P_UART3, 13, 12),
121 RK3576_CRU_RESET_OFFSET(SRST_P_UART4, 13, 13),
122 RK3576_CRU_RESET_OFFSET(SRST_P_UART5, 13, 14),
123 RK3576_CRU_RESET_OFFSET(SRST_P_UART6, 13, 15),
144 RK3576_CRU_RESET_OFFSET(SRST_P_SPI0, 15, 13),
172 RK3576_CRU_RESET_OFFSET(SRST_P_MAILBOX0, 17, 13),
188 RK3576_CRU_RESET_OFFSET(SRST_TIMER8, 18, 13),
203 RK3576_CRU_RESET_OFFSET(SRST_T_BUS_CM0_JTAG, 19, 13),
214 RK3576_CRU_RESET_OFFSET(SRST_I3C1, 20, 13),
224 RK3576_CRU_RESET_OFFSET(SRST_P_DDR_HWLP_CH0, 21, 13),
238 RK3576_CRU_RESET_OFFSET(SRST_H_AHB2APB, 22, 13),
289 RK3576_CRU_RESET_OFFSET(SRST_NPUTIMER1, 31, 13),
304 RK3576_CRU_RESET_OFFSET(SRST_H_RKNNTOP_BIU, 32, 13),
321 RK3576_CRU_RESET_OFFSET(SRST_P_PCIE0, 34, 13),
327 RK3576_CRU_RESET_OFFSET(SRST_A_SLV_MMU0, 35, 13),
369 RK3576_CRU_RESET_OFFSET(SRST_A_HSGPIO, 43, 13),
384 RK3576_CRU_RESET_OFFSET(SRST_A_SLV_MMU2, 47, 13),
398 RK3576_CRU_RESET_OFFSET(SRST_H_RGA2E_0, 49, 13),
455 RK3576_CRU_RESET_OFFSET(SRST_D_VP0, 61, 13),
469 RK3576_CRU_RESET_OFFSET(SRST_H_HDCP0, 63, 13),
477 RK3576_CRU_RESET_OFFSET(SRST_P_EDP0, 64, 13),
486 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX2, 65, 13),
501 RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_TX5, 67, 13),
514 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX5, 68, 13),
521 RK3576_CRU_RESET_OFFSET(SRST_P_GPU_GRF, 69, 13),
599 RK3576_PMU1CRU_RESET_OFFSET(SRST_HDMITXHDP, 1, 13),
611 RK3576_PMU1CRU_RESET_OFFSET(SRST_PMU_CM0_JTAG, 3, 13),
630 RK3576_PMU1CRU_RESET_OFFSET(SRST_PDM0, 5, 13),