Lines Matching +full:12 +full:- +full:13
1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
49 RK3576_CRU_RESET_OFFSET(SRST_M_SAI0_8CH, 7, 12),
50 RK3576_CRU_RESET_OFFSET(SRST_H_SAI0_8CH, 7, 13),
61 RK3576_CRU_RESET_OFFSET(SRST_M_SAI3_2CH, 8, 12),
75 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX1, 9, 12),
85 RK3576_CRU_RESET_OFFSET(SRST_P_INTMUX2BUS, 11, 12),
86 RK3576_CRU_RESET_OFFSET(SRST_P_VCCIO_IOC, 11, 13),
91 RK3576_CRU_RESET_OFFSET(SRST_P_I2C1, 12, 0),
92 RK3576_CRU_RESET_OFFSET(SRST_P_I2C2, 12, 1),
93 RK3576_CRU_RESET_OFFSET(SRST_P_I2C3, 12, 2),
94 RK3576_CRU_RESET_OFFSET(SRST_P_I2C4, 12, 3),
95 RK3576_CRU_RESET_OFFSET(SRST_P_I2C5, 12, 4),
96 RK3576_CRU_RESET_OFFSET(SRST_P_I2C6, 12, 5),
97 RK3576_CRU_RESET_OFFSET(SRST_P_I2C7, 12, 6),
98 RK3576_CRU_RESET_OFFSET(SRST_P_I2C8, 12, 7),
99 RK3576_CRU_RESET_OFFSET(SRST_P_I2C9, 12, 8),
100 RK3576_CRU_RESET_OFFSET(SRST_P_WDT_BUSMCU, 12, 9),
101 RK3576_CRU_RESET_OFFSET(SRST_T_WDT_BUSMCU, 12, 10),
102 RK3576_CRU_RESET_OFFSET(SRST_A_GIC, 12, 11),
103 RK3576_CRU_RESET_OFFSET(SRST_I2C1, 12, 12),
104 RK3576_CRU_RESET_OFFSET(SRST_I2C2, 12, 13),
105 RK3576_CRU_RESET_OFFSET(SRST_I2C3, 12, 14),
106 RK3576_CRU_RESET_OFFSET(SRST_I2C4, 12, 15),
109 RK3576_CRU_RESET_OFFSET(SRST_I2C5, 13, 0),
110 RK3576_CRU_RESET_OFFSET(SRST_I2C6, 13, 1),
111 RK3576_CRU_RESET_OFFSET(SRST_I2C7, 13, 2),
112 RK3576_CRU_RESET_OFFSET(SRST_I2C8, 13, 3),
113 RK3576_CRU_RESET_OFFSET(SRST_I2C9, 13, 4),
114 RK3576_CRU_RESET_OFFSET(SRST_P_SARADC, 13, 6),
115 RK3576_CRU_RESET_OFFSET(SRST_SARADC, 13, 7),
116 RK3576_CRU_RESET_OFFSET(SRST_P_TSADC, 13, 8),
117 RK3576_CRU_RESET_OFFSET(SRST_TSADC, 13, 9),
118 RK3576_CRU_RESET_OFFSET(SRST_P_UART0, 13, 10),
119 RK3576_CRU_RESET_OFFSET(SRST_P_UART2, 13, 11),
120 RK3576_CRU_RESET_OFFSET(SRST_P_UART3, 13, 12),
121 RK3576_CRU_RESET_OFFSET(SRST_P_UART4, 13, 13),
122 RK3576_CRU_RESET_OFFSET(SRST_P_UART5, 13, 14),
123 RK3576_CRU_RESET_OFFSET(SRST_P_UART6, 13, 15),
134 RK3576_CRU_RESET_OFFSET(SRST_S_UART4, 14, 12),
144 RK3576_CRU_RESET_OFFSET(SRST_P_SPI0, 15, 13),
171 RK3576_CRU_RESET_OFFSET(SRST_P_BUSIOC, 17, 12),
172 RK3576_CRU_RESET_OFFSET(SRST_P_MAILBOX0, 17, 13),
187 RK3576_CRU_RESET_OFFSET(SRST_TIMER7, 18, 12),
188 RK3576_CRU_RESET_OFFSET(SRST_TIMER8, 18, 13),
202 RK3576_CRU_RESET_OFFSET(SRST_F_BUS_CM0_CORE, 19, 12),
203 RK3576_CRU_RESET_OFFSET(SRST_T_BUS_CM0_JTAG, 19, 13),
213 RK3576_CRU_RESET_OFFSET(SRST_I3C0, 20, 12),
214 RK3576_CRU_RESET_OFFSET(SRST_I3C1, 20, 13),
224 RK3576_CRU_RESET_OFFSET(SRST_P_DDR_HWLP_CH0, 21, 13),
237 RK3576_CRU_RESET_OFFSET(SRST_P_AHB2APB, 22, 12),
238 RK3576_CRU_RESET_OFFSET(SRST_H_AHB2APB, 22, 13),
276 RK3576_CRU_RESET_OFFSET(SRST_L_RKNN0_BIU, 28, 12),
288 RK3576_CRU_RESET_OFFSET(SRST_NPUTIMER0, 31, 12),
289 RK3576_CRU_RESET_OFFSET(SRST_NPUTIMER1, 31, 13),
303 RK3576_CRU_RESET_OFFSET(SRST_H_RKNN_CBUF, 32, 12),
304 RK3576_CRU_RESET_OFFSET(SRST_H_RKNNTOP_BIU, 32, 13),
315 RK3576_CRU_RESET_OFFSET(SRST_T_EMMC, 33, 12),
321 RK3576_CRU_RESET_OFFSET(SRST_P_PCIE0, 34, 13),
327 RK3576_CRU_RESET_OFFSET(SRST_A_SLV_MMU0, 35, 13),
358 RK3576_CRU_RESET_OFFSET(SRST_H_SDIO, 42, 12),
369 RK3576_CRU_RESET_OFFSET(SRST_A_HSGPIO, 43, 13),
383 RK3576_CRU_RESET_OFFSET(SRST_A_MMU2, 47, 12),
384 RK3576_CRU_RESET_OFFSET(SRST_A_SLV_MMU2, 47, 13),
397 RK3576_CRU_RESET_OFFSET(SRST_A_EBC_BIU, 49, 12),
398 RK3576_CRU_RESET_OFFSET(SRST_H_RGA2E_0, 49, 13),
413 RK3576_CRU_RESET_OFFSET(SRST_D_EBC, 50, 12),
455 RK3576_CRU_RESET_OFFSET(SRST_D_VP0, 61, 13),
468 RK3576_CRU_RESET_OFFSET(SRST_A_HDCP0, 63, 12),
469 RK3576_CRU_RESET_OFFSET(SRST_H_HDCP0, 63, 13),
477 RK3576_CRU_RESET_OFFSET(SRST_P_EDP0, 64, 13),
486 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX2, 65, 13),
500 RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_TX4, 67, 12),
501 RK3576_CRU_RESET_OFFSET(SRST_H_SPDIF_TX5, 67, 13),
513 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX4, 68, 12),
514 RK3576_CRU_RESET_OFFSET(SRST_M_SPDIF_TX5, 68, 13),
521 RK3576_CRU_RESET_OFFSET(SRST_P_GPU_GRF, 69, 13),
534 RK3576_CRU_RESET_OFFSET(SRST_P_CENTER_BIU, 72, 12),
583 RK3576_PMU1CRU_RESET_OFFSET(SRST_P_USBDPPHY, 0, 12),
599 RK3576_PMU1CRU_RESET_OFFSET(SRST_HDMITXHDP, 1, 13),
610 RK3576_PMU1CRU_RESET_OFFSET(SRST_PMU_CM0_CORE, 3, 12),
611 RK3576_PMU1CRU_RESET_OFFSET(SRST_PMU_CM0_JTAG, 3, 13),
623 RK3576_PMU1CRU_RESET_OFFSET(SRST_PMU1PWM, 4, 12),
630 RK3576_PMU1CRU_RESET_OFFSET(SRST_PDM0, 5, 13),