Lines Matching +full:2 +full:- +full:5

1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Elaine Zhang <zhangqing@rock-chips.com>
7 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
25 RK3588_PLL_RATE(2520000000, 2, 210, 0, 0),
26 RK3588_PLL_RATE(2496000000, 2, 208, 0, 0),
27 RK3588_PLL_RATE(2472000000, 2, 206, 0, 0),
28 RK3588_PLL_RATE(2448000000, 2, 204, 0, 0),
29 RK3588_PLL_RATE(2424000000, 2, 202, 0, 0),
30 RK3588_PLL_RATE(2400000000, 2, 200, 0, 0),
31 RK3588_PLL_RATE(2376000000, 2, 198, 0, 0),
32 RK3588_PLL_RATE(2352000000, 2, 196, 0, 0),
33 RK3588_PLL_RATE(2328000000, 2, 194, 0, 0),
34 RK3588_PLL_RATE(2304000000, 2, 192, 0, 0),
35 RK3588_PLL_RATE(2280000000, 2, 190, 0, 0),
36 RK3588_PLL_RATE(2256000000, 2, 376, 1, 0),
37 RK3588_PLL_RATE(2232000000, 2, 372, 1, 0),
38 RK3588_PLL_RATE(2208000000, 2, 368, 1, 0),
39 RK3588_PLL_RATE(2184000000, 2, 364, 1, 0),
40 RK3588_PLL_RATE(2160000000, 2, 360, 1, 0),
41 RK3588_PLL_RATE(2136000000, 2, 356, 1, 0),
42 RK3588_PLL_RATE(2112000000, 2, 352, 1, 0),
43 RK3588_PLL_RATE(2088000000, 2, 348, 1, 0),
44 RK3588_PLL_RATE(2064000000, 2, 344, 1, 0),
45 RK3588_PLL_RATE(2040000000, 2, 340, 1, 0),
46 RK3588_PLL_RATE(2016000000, 2, 336, 1, 0),
47 RK3588_PLL_RATE(1992000000, 2, 332, 1, 0),
48 RK3588_PLL_RATE(1968000000, 2, 328, 1, 0),
49 RK3588_PLL_RATE(1944000000, 2, 324, 1, 0),
50 RK3588_PLL_RATE(1920000000, 2, 320, 1, 0),
51 RK3588_PLL_RATE(1896000000, 2, 316, 1, 0),
52 RK3588_PLL_RATE(1872000000, 2, 312, 1, 0),
53 RK3588_PLL_RATE(1848000000, 2, 308, 1, 0),
54 RK3588_PLL_RATE(1824000000, 2, 304, 1, 0),
55 RK3588_PLL_RATE(1800000000, 2, 300, 1, 0),
56 RK3588_PLL_RATE(1776000000, 2, 296, 1, 0),
57 RK3588_PLL_RATE(1752000000, 2, 292, 1, 0),
58 RK3588_PLL_RATE(1728000000, 2, 288, 1, 0),
59 RK3588_PLL_RATE(1704000000, 2, 284, 1, 0),
60 RK3588_PLL_RATE(1680000000, 2, 280, 1, 0),
61 RK3588_PLL_RATE(1656000000, 2, 276, 1, 0),
62 RK3588_PLL_RATE(1632000000, 2, 272, 1, 0),
63 RK3588_PLL_RATE(1608000000, 2, 268, 1, 0),
64 RK3588_PLL_RATE(1584000000, 2, 264, 1, 0),
65 RK3588_PLL_RATE(1560000000, 2, 260, 1, 0),
66 RK3588_PLL_RATE(1536000000, 2, 256, 1, 0),
67 RK3588_PLL_RATE(1512000000, 2, 252, 1, 0),
68 RK3588_PLL_RATE(1488000000, 2, 248, 1, 0),
69 RK3588_PLL_RATE(1464000000, 2, 244, 1, 0),
70 RK3588_PLL_RATE(1440000000, 2, 240, 1, 0),
71 RK3588_PLL_RATE(1416000000, 2, 236, 1, 0),
72 RK3588_PLL_RATE(1392000000, 2, 232, 1, 0),
73 RK3588_PLL_RATE(1320000000, 2, 220, 1, 0),
74 RK3588_PLL_RATE(1200000000, 2, 200, 1, 0),
75 RK3588_PLL_RATE(1188000000, 2, 198, 1, 0),
76 RK3588_PLL_RATE(1100000000, 3, 550, 2, 0),
77 RK3588_PLL_RATE(1008000000, 2, 336, 2, 0),
78 RK3588_PLL_RATE(1000000000, 3, 500, 2, 0),
79 RK3588_PLL_RATE(983040000, 4, 655, 2, 23592),
80 RK3588_PLL_RATE(955520000, 3, 477, 2, 49806),
81 RK3588_PLL_RATE(903168000, 6, 903, 2, 11009),
82 RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
83 RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
84 RK3588_PLL_RATE(786432000, 2, 262, 2, 9437),
85 RK3588_PLL_RATE(786000000, 1, 131, 2, 0),
86 RK3588_PLL_RATE(785560000, 3, 392, 2, 51117),
87 RK3588_PLL_RATE(722534400, 8, 963, 2, 24850),
88 RK3588_PLL_RATE(600000000, 2, 200, 2, 0),
89 RK3588_PLL_RATE(594000000, 2, 198, 2, 0),
90 RK3588_PLL_RATE(408000000, 2, 272, 3, 0),
91 RK3588_PLL_RATE(312000000, 2, 208, 3, 0),
92 RK3588_PLL_RATE(216000000, 2, 288, 4, 0),
93 RK3588_PLL_RATE(96000000, 2, 256, 5, 0),
99 RK3588_PLL_RATE(1300000000, 3, 325, 2, 0),
116 .reg = RK3576_BIGCORE_CLKSEL_CON(2), \
117 .val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_BIGCORE_DIV_MASK, \
124 .val = HIWORD_UPDATE(_amcore - 1, RK3576_ACLK_M_LITCORE_DIV_MASK, \
130 .reg = RK3576_LITCORE_CLKSEL_CON(2), \
131 .val = HIWORD_UPDATE(_pclkdbg - 1, RK3576_PCLK_DBG_LITCORE_DIV_MASK, \
140 HIWORD_UPDATE(_div - 1, RK3576_ACLK_CCI_DIV_MASK, \
160 RK3576_CCI_CLKSEL4(2, 2), \
163 RK3576_CCI_CLKSEL4(_ccisel, 2), \
168 RK3576_CPUBCLK_RATE(2496000000, 2),
169 RK3576_CPUBCLK_RATE(2400000000, 2),
170 RK3576_CPUBCLK_RATE(2304000000, 2),
171 RK3576_CPUBCLK_RATE(2208000000, 2),
172 RK3576_CPUBCLK_RATE(2184000000, 2),
173 RK3576_CPUBCLK_RATE(2088000000, 2),
174 RK3576_CPUBCLK_RATE(2040000000, 2),
175 RK3576_CPUBCLK_RATE(2016000000, 2),
176 RK3576_CPUBCLK_RATE(1992000000, 2),
177 RK3576_CPUBCLK_RATE(1896000000, 2),
178 RK3576_CPUBCLK_RATE(1800000000, 2),
179 RK3576_CPUBCLK_RATE(1704000000, 2),
180 RK3576_CPUBCLK_RATE(1608000000, 2),
181 RK3576_CPUBCLK_RATE(1584000000, 2),
182 RK3576_CPUBCLK_RATE(1560000000, 2),
183 RK3576_CPUBCLK_RATE(1536000000, 2),
184 RK3576_CPUBCLK_RATE(1512000000, 2),
185 RK3576_CPUBCLK_RATE(1488000000, 2),
186 RK3576_CPUBCLK_RATE(1464000000, 2),
187 RK3576_CPUBCLK_RATE(1440000000, 2),
188 RK3576_CPUBCLK_RATE(1416000000, 2),
189 RK3576_CPUBCLK_RATE(1392000000, 2),
190 RK3576_CPUBCLK_RATE(1368000000, 2),
191 RK3576_CPUBCLK_RATE(1344000000, 2),
192 RK3576_CPUBCLK_RATE(1320000000, 2),
193 RK3576_CPUBCLK_RATE(1296000000, 2),
194 RK3576_CPUBCLK_RATE(1272000000, 2),
195 RK3576_CPUBCLK_RATE(1248000000, 2),
196 RK3576_CPUBCLK_RATE(1224000000, 2),
197 RK3576_CPUBCLK_RATE(1200000000, 2),
198 RK3576_CPUBCLK_RATE(1104000000, 2),
199 RK3576_CPUBCLK_RATE(1008000000, 2),
200 RK3576_CPUBCLK_RATE(912000000, 2),
201 RK3576_CPUBCLK_RATE(816000000, 2),
202 RK3576_CPUBCLK_RATE(696000000, 2),
203 RK3576_CPUBCLK_RATE(600000000, 2),
204 RK3576_CPUBCLK_RATE(408000000, 2),
205 RK3576_CPUBCLK_RATE(312000000, 2),
206 RK3576_CPUBCLK_RATE(216000000, 2),
207 RK3576_CPUBCLK_RATE(96000000, 2),
222 RK3576_CPULCLK_RATE(2400000000, 2, 6, 3),
223 RK3576_CPULCLK_RATE(2304000000, 2, 6, 3),
224 RK3576_CPULCLK_RATE(2208000000, 2, 6, 3),
225 RK3576_CPULCLK_RATE(2184000000, 2, 6, 3),
226 RK3576_CPULCLK_RATE(2088000000, 2, 6, 3),
227 RK3576_CPULCLK_RATE(2040000000, 2, 6, 3),
228 RK3576_CPULCLK_RATE(2016000000, 2, 6, 3),
229 RK3576_CPULCLK_RATE(1992000000, 2, 6, 3),
230 RK3576_CPULCLK_RATE(1896000000, 2, 6, 3),
231 RK3576_CPULCLK_RATE(1800000000, 2, 6, 3),
232 RK3576_CPULCLK_RATE(1704000000, 2, 6, 3),
233 RK3576_CPULCLK_RATE(1608000000, 2, 6, 3),
234 RK3576_CPULCLK_RATE(1584000000, 2, 6, 3),
235 RK3576_CPULCLK_RATE(1560000000, 2, 6, 3),
236 RK3576_CPULCLK_RATE(1536000000, 2, 6, 3),
237 RK3576_CPULCLK_RATE(1512000000, 2, 6, 3),
238 RK3576_CPULCLK_RATE(1488000000, 2, 6, 3),
239 RK3576_CPULCLK_RATE(1464000000, 2, 6, 3),
240 RK3576_CPULCLK_RATE(1440000000, 2, 6, 3),
241 RK3576_CPULCLK_RATE(1416000000, 2, 6, 3),
242 RK3576_CPULCLK_RATE(1392000000, 2, 6, 3),
243 RK3576_CPULCLK_RATE(1368000000, 2, 6, 3),
244 RK3576_CPULCLK_RATE(1344000000, 2, 6, 3),
245 RK3576_CPULCLK_RATE(1320000000, 2, 6, 3),
246 RK3576_CPULCLK_RATE(1296000000, 2, 6, 3),
247 RK3576_CPULCLK_RATE(1272000000, 2, 6, 3),
248 RK3576_CPULCLK_RATE(1248000000, 2, 6, 3),
249 RK3576_CPULCLK_RATE(1224000000, 2, 6, 3),
250 RK3576_CPULCLK_RATE(1200000000, 2, 6, 2),
251 RK3576_CPULCLK_RATE(1104000000, 2, 6, 2),
252 RK3576_CPULCLK_RATE(1008000000, 2, 6, 2),
253 RK3576_CPULCLK_RATE(912000000, 2, 6, 2),
254 RK3576_CPULCLK_RATE(816000000, 2, 6, 2),
255 RK3576_CPULCLK_RATE(696000000, 2, 6, 2),
256 RK3576_CPULCLK_RATE(600000000, 2, 6, 2),
257 RK3576_CPULCLK_RATE(408000000, 2, 6, 2),
258 RK3576_CPULCLK_RATE(312000000, 2, 6, 2),
259 RK3576_CPULCLK_RATE(216000000, 2, 6, 2),
260 RK3576_CPULCLK_RATE(96000000, 2, 6, 2),
380 RK3576_MODE_CON0, 2, 15, 0, rk3576_pll_rates),
388 * CRU Clock-Architecture
391 FACTOR(0, "xin12m", "xin24m", 0, 1, 2),
400 FACTOR(0, "lpll_div2", "lpll", 0, 1, 2),
405 RK3576_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS,
408 RK3576_CLKSEL_CON(0), 11, 1, MFLAGS, 6, 5, DFLAGS,
411 RK3576_CLKSEL_CON(1), 5, 1, MFLAGS, 0, 5, DFLAGS,
412 RK3576_CLKGATE_CON(0), 2, GFLAGS),
414 RK3576_CLKSEL_CON(1), 11, 1, MFLAGS, 6, 5, DFLAGS,
417 RK3576_CLKSEL_CON(2), 5, 1, MFLAGS, 0, 5, DFLAGS,
420 RK3576_CLKSEL_CON(2), 11, 1, MFLAGS, 6, 5, DFLAGS,
421 RK3576_CLKGATE_CON(0), 5, GFLAGS),
423 RK3576_CLKSEL_CON(3), 5, 2, MFLAGS, 0, 5, DFLAGS,
426 RK3576_CLKSEL_CON(3), 12, 1, MFLAGS, 7, 5, DFLAGS,
429 RK3576_CLKSEL_CON(4), 11, 1, MFLAGS, 6, 5, DFLAGS,
432 RK3576_CLKSEL_CON(5), 5, 1, MFLAGS, 0, 5, DFLAGS,
435 RK3576_CLKSEL_CON(6), 5, 3, MFLAGS, 0, 5, DFLAGS,
438 RK3576_CLKSEL_CON(8), 7, 2, MFLAGS,
441 RK3576_CLKSEL_CON(9), 5, 2, MFLAGS, 0, 5, DFLAGS,
444 RK3576_CLKSEL_CON(10), 5, 1, MFLAGS, 0, 5, DFLAGS,
447 RK3576_CLKSEL_CON(10), 11, 3, MFLAGS, 6, 5, DFLAGS,
450 RK3576_CLKSEL_CON(19), 2, 2, MFLAGS,
453 RK3576_CLKSEL_CON(19), 6, 2, MFLAGS,
454 RK3576_CLKGATE_CON(2), 0, GFLAGS),
456 RK3576_CLKSEL_CON(19), 12, 2, MFLAGS, 8, 4, DFLAGS,
457 RK3576_CLKGATE_CON(2), 1, GFLAGS),
459 RK3576_CLKSEL_CON(13), 0, 2, MFLAGS),
464 RK3576_CLKSEL_CON(15), 0, 2, MFLAGS),
469 RK3576_CLKSEL_CON(17), 0, 2, MFLAGS),
474 RK3576_CLKSEL_CON(19), 0, 2, MFLAGS),
479 RK3576_CLKSEL_CON(22), 0, 2, MFLAGS),
482 RK3576_CLKGATE_CON(2), 5, GFLAGS),
484 RK3576_CLKSEL_CON(24), 0, 2, MFLAGS),
487 RK3576_CLKGATE_CON(2), 6, GFLAGS),
489 RK3576_CLKSEL_CON(26), 0, 2, MFLAGS),
492 RK3576_CLKGATE_CON(2), 7, GFLAGS),
494 RK3576_CLKSEL_CON(27), 13, 3, MFLAGS, 5, 8, DFLAGS,
495 RK3576_CLKGATE_CON(2), 13, GFLAGS),
497 RK3576_CLKSEL_CON(28), 0, 5, DFLAGS,
498 RK3576_CLKGATE_CON(2), 14, GFLAGS),
500 RK3576_CLKSEL_CON(28), 5, 5, DFLAGS,
501 RK3576_CLKGATE_CON(2), 15, GFLAGS),
503 RK3576_CLKSEL_CON(28), 10, 5, DFLAGS,
507 RK3576_CLKGATE_CON(3), 2, GFLAGS),
509 RK3576_CLKSEL_CON(30), 10, 5, DFLAGS,
512 RK3576_CLKSEL_CON(31), 0, 5, DFLAGS,
515 RK3576_CLKSEL_CON(31), 10, 2, MFLAGS, 5, 5, DFLAGS,
518 RK3576_CLKSEL_CON(32), 5, 2, MFLAGS, 0, 5, DFLAGS,
525 RK3576_CLKGATE_CON(4), 2, GFLAGS),
531 RK3576_CLKGATE_CON(5), 10, GFLAGS),
534 RK3576_CLKGATE_CON(5), 11, GFLAGS),
536 RK3576_CLKSEL_CON(37), 8, 2, MFLAGS, 0, 8, DFLAGS,
537 RK3576_CLKGATE_CON(5), 12, GFLAGS),
539 RK3576_CLKGATE_CON(5), 13, GFLAGS),
541 RK3576_CLKGATE_CON(5), 14, GFLAGS),
543 RK3576_CLKGATE_CON(5), 15, GFLAGS),
545 RK3576_CLKSEL_CON(38), 8, 2, MFLAGS, 0, 8, DFLAGS,
548 RK3576_CLKSEL_CON(39), 8, 2, MFLAGS, 0, 8, DFLAGS,
551 RK3576_CLKSEL_CON(40), 8, 2, MFLAGS, 0, 8, DFLAGS,
552 RK3576_CLKGATE_CON(6), 5, GFLAGS),
554 RK3576_CLKSEL_CON(41), 7, 3, MFLAGS, 2, 5, DFLAGS,
559 RK3576_CLKSEL_CON(55), 0, 2, MFLAGS,
562 RK3576_CLKSEL_CON(55), 2, 2, MFLAGS,
565 RK3576_CLKSEL_CON(55), 9, 1, MFLAGS, 4, 5, DFLAGS,
566 RK3576_CLKGATE_CON(11), 2, GFLAGS),
570 RK3576_CLKSEL_CON(56), 5, 2, MFLAGS, 0, 5, DFLAGS,
575 RK3576_CLKSEL_CON(56), 12, 2, MFLAGS, 7, 5, DFLAGS,
584 RK3576_CLKGATE_CON(12), 2, GFLAGS),
590 RK3576_CLKGATE_CON(12), 5, GFLAGS),
604 RK3576_CLKSEL_CON(57), 0, 2, MFLAGS,
607 RK3576_CLKSEL_CON(57), 2, 2, MFLAGS,
610 RK3576_CLKSEL_CON(57), 4, 2, MFLAGS,
613 RK3576_CLKSEL_CON(57), 6, 2, MFLAGS,
616 RK3576_CLKSEL_CON(57), 8, 2, MFLAGS,
619 RK3576_CLKSEL_CON(57), 10, 2, MFLAGS,
622 RK3576_CLKSEL_CON(57), 12, 2, MFLAGS,
623 RK3576_CLKGATE_CON(13), 2, GFLAGS),
625 RK3576_CLKSEL_CON(57), 14, 2, MFLAGS,
628 RK3576_CLKSEL_CON(58), 0, 2, MFLAGS,
657 RK3576_CLKGATE_CON(14), 2, GFLAGS),
664 RK3576_CLKGATE_CON(14), 5, GFLAGS),
679 RK3576_CLKGATE_CON(15), 2, GFLAGS),
682 RK3576_CLKGATE_CON(15), 5, GFLAGS),
706 RK3576_CLKSEL_CON(70), 13, 2, MFLAGS,
707 RK3576_CLKGATE_CON(16), 2, GFLAGS),
709 RK3576_CLKSEL_CON(71), 0, 2, MFLAGS,
712 RK3576_CLKSEL_CON(71), 2, 2, MFLAGS,
715 RK3576_CLKSEL_CON(71), 4, 2, MFLAGS,
716 RK3576_CLKGATE_CON(16), 5, GFLAGS),
718 RK3576_CLKSEL_CON(71), 6, 2, MFLAGS,
727 RK3576_CLKSEL_CON(71), 8, 2, MFLAGS,
739 RK3576_CLKGATE_CON(17), 5, GFLAGS),
761 RK3576_CLKGATE_CON(18), 2, GFLAGS),
767 RK3576_CLKGATE_CON(18), 5, GFLAGS),
775 RK3576_CLKSEL_CON(72), 5, 1, MFLAGS, 0, 5, DFLAGS,
783 RK3576_CLKSEL_CON(72), 12, 2, MFLAGS, 7, 5, DFLAGS,
786 RK3576_CLKSEL_CON(73), 5, 2, MFLAGS, 0, 5, DFLAGS,
797 RK3576_CLKGATE_CON(19), 2, GFLAGS),
807 RK3576_CLKSEL_CON(73), 13, 2, MFLAGS,
812 RK3576_CLKSEL_CON(74), 5, 1, MFLAGS, 0, 5, DFLAGS,
819 RK3576_CLKSEL_CON(74), 6, 2, MFLAGS,
820 RK3576_CLKGATE_CON(20), 5, GFLAGS),
838 RK3576_CLKSEL_CON(78), 5, 2, MFLAGS, 0, 5, DFLAGS,
841 RK3576_CLKSEL_CON(78), 12, 2, MFLAGS, 7, 5, DFLAGS,
844 RK3576_CLKGATE_CON(40), 2, GFLAGS),
848 RK3576_CCI_CLKSEL_CON(4), 5, 2, MFLAGS, 0, 5, DFLAGS,
851 RK3576_CCI_CLKSEL_CON(4), 12, 2, MFLAGS, 7, 5, DFLAGS,
856 RK3576_CLKSEL_CON(168), 5, 3, MFLAGS,
857 RK3576_CLKSEL_CON(167), 9, 5, DFLAGS,
860 RK3576_CLKSEL_CON(168), 8, 2, MFLAGS,
863 RK3576_CLKSEL_CON(168), 10, 2, MFLAGS,
864 RK3576_CLKGATE_CON(72), 2, GFLAGS),
866 RK3576_CLKSEL_CON(168), 12, 2, MFLAGS,
869 RK3576_CLKGATE_CON(72), 5, GFLAGS),
879 RK3576_CLKSEL_CON(76), 5, 2, MFLAGS, 0, 5, DFLAGS,
884 RK3576_CLKSEL_CON(77), 5, 1, MFLAGS, 0, 5, DFLAGS,
894 RK3576_CLKGATE_CON(23), 5, GFLAGS),
902 RK3576_CLKSEL_CON(77), 12, 1, MFLAGS, 7, 5, DFLAGS,
907 RK3576_CLKSEL_CON(165), 5, 3, MFLAGS, 0, 5, DFLAGS,
912 RK3576_CLKSEL_CON(166), 10, 2, MFLAGS,
917 RK3576_CLKSEL_CON(86), 0, 2, MFLAGS,
920 RK3576_CLKSEL_CON(86), 7, 2, MFLAGS, 2, 5, DFLAGS,
921 RK3576_CLKGATE_CON(31), 5, GFLAGS),
927 RK3576_CLKSEL_CON(87), 0, 2, MFLAGS,
932 RK3576_CLKSEL_CON(87), 2, 1, MFLAGS,
945 RK3576_CLKSEL_CON(87), 3, 2, MFLAGS,
946 RK3576_CLKGATE_CON(32), 5, GFLAGS),
950 RK3576_CLKSEL_CON(87), 10, 1, MFLAGS, 5, 5, DFLAGS,
957 RK3576_CLKSEL_CON(88), 0, 2, MFLAGS,
960 RK3576_CLKSEL_CON(88), 7, 1, MFLAGS, 2, 5, DFLAGS,
963 RK3576_CLKSEL_CON(89), 6, 2, MFLAGS, 0, 6, DFLAGS,
968 RK3576_CLKSEL_CON(89), 14, 2, MFLAGS, 8, 6, DFLAGS,
975 RK3576_CLKSEL_CON(90), 0, 2, MFLAGS,
982 RK3576_CLKSEL_CON(115), 5, 1, MFLAGS, 0, 5, DFLAGS,
985 RK3576_CLKSEL_CON(115), 11, 1, MFLAGS, 6, 5, DFLAGS,
988 RK3576_CLKSEL_CON(115), 12, 2, MFLAGS,
989 RK3576_CLKGATE_CON(47), 2, GFLAGS),
991 RK3576_CLKGATE_CON(47), 5, GFLAGS),
1005 RK3576_CLKSEL_CON(110), 0, 2, MFLAGS,
1008 RK3576_CLKSEL_CON(110), 7, 2, MFLAGS, 2, 5, DFLAGS,
1011 RK3576_CLKSEL_CON(110), 14, 2, MFLAGS, 9, 5, DFLAGS,
1012 RK3576_CLKGATE_CON(45), 2, GFLAGS),
1016 RK3576_CLKSEL_CON(111), 5, 2, MFLAGS, 0, 5, DFLAGS,
1023 RK3576_CLKSEL_CON(124), 0, 2, MFLAGS,
1026 RK3576_CLKSEL_CON(124), 7, 1, MFLAGS, 2, 5, DFLAGS,
1029 RK3576_CLKSEL_CON(124), 13, 3, MFLAGS, 8, 5, DFLAGS,
1034 RK3576_CLKGATE_CON(51), 5, GFLAGS),
1038 RK3576_CLKSEL_CON(128), 5, 3, MFLAGS, 0, 5, DFLAGS,
1044 RK3576_CLKSEL_CON(128), 8, 2, MFLAGS,
1047 RK3576_CLKSEL_CON(128), 10, 2, MFLAGS,
1048 RK3576_CLKGATE_CON(53), 2, GFLAGS),
1050 RK3576_CLKSEL_CON(129), 5, 1, MFLAGS, 0, 5, DFLAGS,
1057 RK3576_CLKSEL_CON(129), 11, 3, MFLAGS, 6, 5, DFLAGS,
1076 RK3576_CLKGATE_CON(54), 5, GFLAGS),
1084 RK3576_CLKSEL_CON(130), 7, 2, MFLAGS,
1089 RK3576_CLKSEL_CON(144), 5, 3, MFLAGS, 0, 5, DFLAGS,
1092 RK3576_CLKSEL_CON(144), 10, 2, MFLAGS,
1093 RK3576_CLKGATE_CON(61), 2, GFLAGS),
1095 RK3576_CLKSEL_CON(144), 12, 2, MFLAGS,
1122 RK3576_CLKSEL_CON(149), 5, 2, MFLAGS, 0, 5, DFLAGS,
1125 RK3576_CLKSEL_CON(149), 7, 2, MFLAGS,
1128 RK3576_CLKSEL_CON(149), 11, 2, MFLAGS,
1139 RK3576_CLKGATE_CON(64), 5, GFLAGS),
1146 RK3576_CLKSEL_CON(151), 15, 1, MFLAGS, 10, 5, DFLAGS,
1155 RK3576_CLKSEL_CON(152), 1, 2, MFLAGS,
1158 RK3576_CLKSEL_CON(154), 10, 3, MFLAGS, 2, 8, DFLAGS,
1164 RK3576_CLKGATE_CON(65), 5, GFLAGS),
1176 RK3576_CLKSEL_CON(156), 5, 3, MFLAGS, 0, 5, DFLAGS,
1181 RK3576_CLKSEL_CON(156), 13, 2, MFLAGS, 8, 5, DFLAGS,
1186 RK3576_CLKSEL_CON(158), 5, 2, MFLAGS, 0, 5, DFLAGS,
1189 RK3576_CLKSEL_CON(158), 7, 2, MFLAGS,
1190 RK3576_CLKGATE_CON(67), 2, GFLAGS),
1192 RK3576_CLKSEL_CON(158), 9, 2, MFLAGS,
1199 RK3576_CLKGATE_CON(66), 2, GFLAGS),
1229 RK3576_CLKGATE_CON(68), 5, GFLAGS),
1251 RK3576_CLKSEL_CON(118), 5, 3, MFLAGS, 0, 5, DFLAGS,
1254 RK3576_CLKSEL_CON(118), 8, 2, MFLAGS,
1257 RK3576_CLKSEL_CON(118), 10, 2, MFLAGS,
1258 RK3576_CLKGATE_CON(49), 2, GFLAGS),
1260 RK3576_CLKSEL_CON(119), 5, 2, MFLAGS, 0, 5, DFLAGS,
1263 RK3576_CLKSEL_CON(119), 7, 2, MFLAGS,
1270 RK3576_CLKSEL_CON(120), 5, 3, MFLAGS, 0, 5, DFLAGS,
1277 RK3576_CLKGATE_CON(50), 2, GFLAGS),
1281 RK3576_CLKSEL_CON(120), 13, 1, MFLAGS, 8, 5, DFLAGS,
1284 RK3576_CLKGATE_CON(50), 5, GFLAGS),
1288 RK3576_CLKSEL_CON(121), 5, 3, MFLAGS, 0, 5, DFLAGS,
1305 RK3576_CLKSEL_CON(178), 0, 2, MFLAGS,
1308 RK3576_CLKSEL_CON(180), 5, 1, MFLAGS, 0, 5, DFLAGS,
1315 RK3576_CLKSEL_CON(180), 11, 3, MFLAGS, 6, 5, DFLAGS,
1316 RK3576_CLKGATE_CON(79), 5, GFLAGS),
1320 RK3576_CLKSEL_CON(92), 0, 2, MFLAGS,
1323 RK3576_CLKSEL_CON(92), 9, 1, MFLAGS, 4, 5, DFLAGS,
1340 RK3576_CLKGATE_CON(35), 5, GFLAGS),
1366 RK3576_CLKGATE_CON(37), 2, GFLAGS),
1372 RK3576_CLKGATE_CON(37), 5, GFLAGS),
1376 RK3576_CLKSEL_CON(42), 0, 2, MFLAGS,
1383 RK3576_CLKGATE_CON(7), 5, GFLAGS),
1387 RK3576_CLKSEL_CON(42), 7, 2, MFLAGS, 2, 5, DFLAGS,
1390 RK3576_CLKSEL_CON(42), 14, 2, MFLAGS, 9, 5, DFLAGS,
1393 RK3576_CLKSEL_CON(43), 5, 2, MFLAGS, 0, 5, DFLAGS,
1396 RK3576_CLKSEL_CON(43), 12, 2, MFLAGS, 7, 5, DFLAGS,
1402 RK3576_CLKSEL_CON(44), 11, 2, MFLAGS,
1409 RK3576_CLKSEL_CON(45), 5, 2, MFLAGS, 0, 5, DFLAGS,
1414 RK3576_CLKSEL_CON(45), 12, 2, MFLAGS, 7, 5, DFLAGS,
1421 RK3576_CLKGATE_CON(8), 5, GFLAGS),
1428 RK3576_CLKSEL_CON(47), 11, 2, MFLAGS,
1436 RK3576_CLKSEL_CON(48), 11, 2, MFLAGS,
1444 RK3576_CLKSEL_CON(49), 11, 2, MFLAGS,
1447 RK3576_CLKGATE_CON(9), 2, GFLAGS),
1454 RK3576_CLKGATE_CON(9), 5, GFLAGS),
1458 RK3576_CLKGATE_CON(3), 5, GFLAGS),
1460 RK3576_CLKSEL_CON(51), 5, 3, MFLAGS, 0, 5, DFLAGS,
1485 RK3576_CLKSEL_CON(103), 0, 2, MFLAGS,
1488 RK3576_CLKSEL_CON(103), 7, 1, MFLAGS, 2, 5, DFLAGS,
1491 RK3576_CLKSEL_CON(103), 8, 2, MFLAGS,
1492 RK3576_CLKGATE_CON(42), 2, GFLAGS),
1502 RK3576_CLKSEL_CON(104), 6, 2, MFLAGS, 0, 6, DFLAGS,
1507 RK3576_CLKSEL_CON(104), 13, 2, MFLAGS, 8, 5, DFLAGS,
1510 RK3576_CLKSEL_CON(105), 5, 2, MFLAGS, 0, 5, DFLAGS,
1517 RK3576_CLKSEL_CON(105), 13, 2, MFLAGS, 7, 6, DFLAGS,
1520 RK3576_CLKGATE_CON(43), 2, GFLAGS),
1522 RK3576_CLKSEL_CON(106), 6, 2, MFLAGS, 0, 6, DFLAGS,
1527 RK3576_CLKSEL_CON(106), 13, 1, MFLAGS, 8, 5, DFLAGS,
1528 RK3576_CLKGATE_CON(43), 5, GFLAGS),
1534 RK3576_CLKSEL_CON(107), 5, 1, MFLAGS, 0, 5, DFLAGS,
1539 RK3576_CLKSEL_CON(107), 11, 2, MFLAGS, 6, 5, DFLAGS,
1542 RK3576_CLKSEL_CON(108), 5, 2, MFLAGS, 0, 5, DFLAGS,
1549 RK3576_PHP_CLKGATE_CON(0), 2, GFLAGS),
1551 RK3576_PHP_CLKGATE_CON(0), 5, GFLAGS),
1555 RK3576_PHP_CLKSEL_CON(0), 2, 5, DFLAGS,
1558 RK3576_PHP_CLKSEL_CON(0), 7, 5, DFLAGS,
1559 RK3576_PHP_CLKGATE_CON(1), 2, GFLAGS),
1561 RK3576_PHP_CLKSEL_CON(0), 12, 2, MFLAGS,
1562 RK3576_PHP_CLKGATE_CON(1), 5, GFLAGS),
1564 RK3576_PHP_CLKSEL_CON(0), 14, 2, MFLAGS,
1572 RK3576_PMU_CLKGATE_CON(3), 2, GFLAGS),
1574 RK3576_PMU_CLKSEL_CON(4), 4, 5, DFLAGS,
1576 FACTOR_GATE(CLK_50M_PMU_SRC, "clk_50m_pmu_src", "clk_100m_pmu_src", 0, 1, 2,
1579 RK3576_PMU_CLKSEL_CON(4), 0, 2, MFLAGS,
1582 RK3576_PMU_CLKSEL_CON(4), 2, 2, MFLAGS,
1585 RK3576_PMU_CLKSEL_CON(20), 0, 2, MFLAGS,
1594 RK3576_PMU_CLKGATE_CON(4), 2, GFLAGS),
1596 RK3576_PMU_CLKGATE_CON(5), 0, GFLAGS),
1600 RK3576_PMU_CLKGATE_CON(0), 2, GFLAGS),
1606 RK3576_PMU_CLKSEL_CON(0), 0, 5, DFLAGS,
1613 RK3576_PMU_CLKGATE_CON(2), 0, GFLAGS),
1615 RK3576_PMU_CLKSEL_CON(3), 0, 2, MFLAGS),
1617 RK3576_PMU_CLKGATE_CON(2), 5, GFLAGS),
1621 RK3576_PMU_CLKSEL_CON(4), 14, 1, MFLAGS, 9, 5, DFLAGS,
1624 RK3576_PMU_CLKGATE_CON(4), 5, GFLAGS),
1631 RK3576_PMU_CLKSEL_CON(5), 0, 2, MFLAGS,
1640 RK3576_PMU_CLKSEL_CON(5), 2, 2, MFLAGS,
1645 RK3576_PMU_CLKGATE_CON(5), 1, GFLAGS),
1647 RK3576_PMU_CLKSEL_CON(6), 7, 2, MFLAGS,
1648 RK3576_PMU_CLKGATE_CON(5), 2, GFLAGS),
1651 RK3576_PMU_CLKGATE_CON(5), 5, GFLAGS),
1653 RK3576_PMU_CLKGATE_CON(5), 6, GFLAGS),
1655 RK3576_PMU_CLKGATE_CON(5), 13, GFLAGS),
1657 RK3576_PMU_CLKGATE_CON(5), 15, GFLAGS),
1665 RK3576_PMU_CLKSEL_CON(11), 6, 1, MFLAGS, 1, 5, DFLAGS,
1670 RK3576_PMU_CLKSEL_CON(20), 2, 1, MFLAGS,
1675 RK3576_PMU_CLKGATE_CON(5), 7, GFLAGS),
1681 RK3576_PMU0_GRF_OSC_CON6, 2, 1, MFLAGS),
1689 RK3576_SECURE_NS_CLKSEL_CON(0), 0, 2, MFLAGS,
1692 RK3576_SECURE_NS_CLKSEL_CON(0), 2, 2, MFLAGS,
1695 RK3576_SECURE_NS_CLKSEL_CON(0), 4, 2, MFLAGS,
1696 RK3576_SECURE_NS_CLKGATE_CON(0), 2, GFLAGS),
1714 RK3576_CLKGATE_CON(59), 2, GFLAGS),
1720 RK3576_CLKGATE_CON(59), 5, GFLAGS),
1733 grf = syscon_regmap_lookup_by_compatible("rockchip,rk3576-pmu0-grf"); in rk3576_clk_init()
1752 ctx->grf = grf; in rk3576_clk_init()
1777 CLK_OF_DECLARE(rk3576_cru, "rockchip,rk3576-cru", rk3576_clk_init);
1789 .compatible = "rockchip,rk3576-cru",
1798 struct device *dev = &pdev->dev; in clk_rk3576_probe()
1802 return -EINVAL; in clk_rk3576_probe()
1804 if (init_data->inits) in clk_rk3576_probe()
1805 init_data->inits(dev->of_node); in clk_rk3576_probe()
1813 .name = "clk-rk3576",