55 	struct cpg_pll_clk *pll_clk = to_pll_clk(hw);  in cpg_pll_clk_recalc_rate()  local
59 	val = readl(pll_clk->pllcr_reg) & CPG_PLLnCR_STC_MASK;  in cpg_pll_clk_recalc_rate()
62 	return parent_rate * mult * pll_clk->fixed_mult;  in cpg_pll_clk_recalc_rate()
68 	struct cpg_pll_clk *pll_clk = to_pll_clk(hw);  in cpg_pll_clk_determine_rate()  local
72 	prate = req->best_parent_rate * pll_clk->fixed_mult;  in cpg_pll_clk_determine_rate()
88 	struct cpg_pll_clk *pll_clk = to_pll_clk(hw);  in cpg_pll_clk_set_rate()  local
92 	mult = DIV_ROUND_CLOSEST_ULL(rate, parent_rate * pll_clk->fixed_mult);  in cpg_pll_clk_set_rate()
95 	val = readl(pll_clk->pllcr_reg);  in cpg_pll_clk_set_rate()
98 	writel(val, pll_clk->pllcr_reg);  in cpg_pll_clk_set_rate()
101 		if (readl(pll_clk->pllecr_reg) & pll_clk->pllecr_pllst_mask)  in cpg_pll_clk_set_rate()
124 	struct cpg_pll_clk *pll_clk;  in cpg_pll_clk_register()  local
128 	pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL);  in cpg_pll_clk_register()
129 	if (!pll_clk)  in cpg_pll_clk_register()
137 	pll_clk->hw.init = &init;  in cpg_pll_clk_register()
138 	pll_clk->pllcr_reg = base + offset;  in cpg_pll_clk_register()
139 	pll_clk->pllecr_reg = base + CPG_PLLECR;  in cpg_pll_clk_register()
140 	pll_clk->fixed_mult = mult;	/* PLL refclk x (setting + 1) x mult */  in cpg_pll_clk_register()
141 	pll_clk->pllecr_pllst_mask = CPG_PLLECR_PLLST(index);  in cpg_pll_clk_register()
143 	clk = clk_register(NULL, &pll_clk->hw);  in cpg_pll_clk_register()
145 		kfree(pll_clk);  in cpg_pll_clk_register()