Lines Matching +full:rt2880 +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
23 /* RT2880 SoC */
166 { CLK_PERIPH("300100.timer", "bus") },
176 { CLK_PERIPH("10000100.timer", "bus") },
189 { CLK_PERIPH("10000100.timer", "bus") },
202 { CLK_PERIPH("10000100.timer", "periph") },
215 { CLK_PERIPH("10000100.timer", "periph") },
232 struct clk_hw **hws = clk_data->hws; in mtmips_register_pherip_clocks()
234 size_t idx_start = priv->data->num_clk_base + priv->data->num_clk_fixed + in mtmips_register_pherip_clocks()
235 priv->data->num_clk_factor; in mtmips_register_pherip_clocks()
238 for (i = 0; i < priv->data->num_clk_periph; i++) { in mtmips_register_pherip_clocks()
241 sclk = &priv->data->clk_periph[i]; in mtmips_register_pherip_clocks()
242 ret = of_clk_hw_register(np, &sclk->hw); in mtmips_register_pherip_clocks()
248 hws[idx] = &sclk->hw; in mtmips_register_pherip_clocks()
254 while (--i >= 0) { in mtmips_register_pherip_clocks()
255 sclk = &priv->data->clk_periph[i]; in mtmips_register_pherip_clocks()
256 clk_hw_unregister(&sclk->hw); in mtmips_register_pherip_clocks()
289 struct clk_hw **hws = clk_data->hws; in mtmips_register_fixed_clocks()
291 size_t idx_start = priv->data->num_clk_base; in mtmips_register_fixed_clocks()
294 for (i = 0; i < priv->data->num_clk_fixed; i++) { in mtmips_register_fixed_clocks()
297 sclk = &priv->data->clk_fixed[i]; in mtmips_register_fixed_clocks()
298 sclk->hw = clk_hw_register_fixed_rate(NULL, sclk->name, in mtmips_register_fixed_clocks()
299 sclk->parent, 0, in mtmips_register_fixed_clocks()
300 sclk->rate); in mtmips_register_fixed_clocks()
301 if (IS_ERR(sclk->hw)) { in mtmips_register_fixed_clocks()
302 ret = PTR_ERR(sclk->hw); in mtmips_register_fixed_clocks()
307 hws[idx] = sclk->hw; in mtmips_register_fixed_clocks()
313 while (--i >= 0) { in mtmips_register_fixed_clocks()
314 sclk = &priv->data->clk_fixed[i]; in mtmips_register_fixed_clocks()
315 clk_hw_unregister_fixed_rate(sclk->hw); in mtmips_register_fixed_clocks()
349 struct clk_hw **hws = clk_data->hws; in mtmips_register_factor_clocks()
351 size_t idx_start = priv->data->num_clk_base + priv->data->num_clk_fixed; in mtmips_register_factor_clocks()
354 for (i = 0; i < priv->data->num_clk_factor; i++) { in mtmips_register_factor_clocks()
357 sclk = &priv->data->clk_factor[i]; in mtmips_register_factor_clocks()
358 sclk->hw = clk_hw_register_fixed_factor(NULL, sclk->name, in mtmips_register_factor_clocks()
359 sclk->parent, sclk->flags, in mtmips_register_factor_clocks()
360 sclk->mult, sclk->div); in mtmips_register_factor_clocks()
361 if (IS_ERR(sclk->hw)) { in mtmips_register_factor_clocks()
362 ret = PTR_ERR(sclk->hw); in mtmips_register_factor_clocks()
367 hws[idx] = sclk->hw; in mtmips_register_factor_clocks()
373 while (--i >= 0) { in mtmips_register_factor_clocks()
374 sclk = &priv->data->clk_factor[i]; in mtmips_register_factor_clocks()
375 clk_hw_unregister_fixed_factor(sclk->hw); in mtmips_register_factor_clocks()
395 struct regmap *sysc = clk->priv->sysc; in rt5350_xtal_recalc_rate()
409 struct regmap *sysc = clk->priv->sysc; in rt5350_cpu_recalc_rate()
440 struct regmap *sysc = clk->priv->sysc; in rt3352_cpu_recalc_rate()
460 struct regmap *sysc = clk->priv->sysc; in rt305x_cpu_recalc_rate()
480 struct regmap *sysc = clk->priv->sysc; in rt3883_cpu_recalc_rate()
504 struct regmap *sysc = clk->priv->sysc; in rt3883_bus_recalc_rate()
530 struct regmap *sysc = clk->priv->sysc; in rt2880_cpu_recalc_rate()
566 struct regmap *sysc = clk->priv->sysc; in mt7620_pll_recalc_rate()
606 struct regmap *sysc = clk->priv->sysc; in mt7620_cpu_recalc_rate()
630 struct regmap *sysc = clk->priv->sysc; in mt7620_bus_recalc_rate()
654 struct regmap *sysc = clk->priv->sysc; in mt7620_periph_recalc_rate()
668 struct regmap *sysc = clk->priv->sysc; in mt76x8_xtal_recalc_rate()
745 struct clk_hw **hws = clk_data->hws; in mtmips_register_clocks()
749 for (i = 0; i < priv->data->num_clk_base; i++) { in mtmips_register_clocks()
750 sclk = &priv->data->clk_base[i]; in mtmips_register_clocks()
751 sclk->priv = priv; in mtmips_register_clocks()
752 ret = of_clk_hw_register(np, &sclk->hw); in mtmips_register_clocks()
758 hws[i] = &sclk->hw; in mtmips_register_clocks()
764 while (--i >= 0) { in mtmips_register_clocks()
765 sclk = &priv->data->clk_base[i]; in mtmips_register_clocks()
766 clk_hw_unregister(&sclk->hw); in mtmips_register_clocks()
850 .compatible = "ralink,rt2880-reset",
854 .compatible = "ralink,rt2880-sysc",
858 .compatible = "ralink,rt3050-sysc",
862 .compatible = "ralink,rt3052-sysc",
866 .compatible = "ralink,rt3352-sysc",
870 .compatible = "ralink,rt3883-sysc",
874 .compatible = "ralink,rt5350-sysc",
878 .compatible = "ralink,mt7620-sysc",
882 .compatible = "ralink,mt7628-sysc",
886 .compatible = "ralink,mt7688-sysc",
897 if (!of_device_is_compatible(node, "ralink,mt7620-sysc")) in mtmips_clk_regs_init()
905 regmap_read(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, &t); in mtmips_clk_regs_init()
908 regmap_write(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, t); in mtmips_clk_regs_init()
923 priv->sysc = syscon_node_to_regmap(node); in mtmips_clk_init()
924 if (IS_ERR(priv->sysc)) { in mtmips_clk_init()
935 data = match->data; in mtmips_clk_init()
936 priv->data = data; in mtmips_clk_init()
937 count = priv->data->num_clk_base + priv->data->num_clk_fixed + in mtmips_clk_init()
938 priv->data->num_clk_factor + priv->data->num_clk_periph; in mtmips_clk_init()
967 clk_data->num = count; in mtmips_clk_init()
978 for (i = 0; i < priv->data->num_clk_periph; i++) { in mtmips_clk_init()
979 struct mtmips_clk *sclk = &priv->data->clk_periph[i]; in mtmips_clk_init()
981 clk_hw_unregister(&sclk->hw); in mtmips_clk_init()
985 for (i = 0; i < priv->data->num_clk_factor; i++) { in mtmips_clk_init()
986 struct mtmips_clk_factor *sclk = &priv->data->clk_factor[i]; in mtmips_clk_init()
988 clk_hw_unregister_fixed_factor(sclk->hw); in mtmips_clk_init()
992 for (i = 0; i < priv->data->num_clk_fixed; i++) { in mtmips_clk_init()
993 struct mtmips_clk_fixed *sclk = &priv->data->clk_fixed[i]; in mtmips_clk_init()
995 clk_hw_unregister_fixed_rate(sclk->hw); in mtmips_clk_init()
999 for (i = 0; i < priv->data->num_clk_base; i++) { in mtmips_clk_init()
1000 struct mtmips_clk *sclk = &priv->data->clk_base[i]; in mtmips_clk_init()
1002 clk_hw_unregister(&sclk->hw); in mtmips_clk_init()
1011 CLK_OF_DECLARE_DRIVER(rt2880_clk, "ralink,rt2880-sysc", mtmips_clk_init);
1012 CLK_OF_DECLARE_DRIVER(rt3050_clk, "ralink,rt3050-sysc", mtmips_clk_init);
1013 CLK_OF_DECLARE_DRIVER(rt3052_clk, "ralink,rt3052-sysc", mtmips_clk_init);
1014 CLK_OF_DECLARE_DRIVER(rt3352_clk, "ralink,rt3352-sysc", mtmips_clk_init);
1015 CLK_OF_DECLARE_DRIVER(rt3883_clk, "ralink,rt3883-sysc", mtmips_clk_init);
1016 CLK_OF_DECLARE_DRIVER(rt5350_clk, "ralink,rt5350-sysc", mtmips_clk_init);
1017 CLK_OF_DECLARE_DRIVER(mt7620_clk, "ralink,mt7620-sysc", mtmips_clk_init);
1018 CLK_OF_DECLARE_DRIVER(mt7628_clk, "ralink,mt7628-sysc", mtmips_clk_init);
1019 CLK_OF_DECLARE_DRIVER(mt7688_clk, "ralink,mt7688-sysc", mtmips_clk_init);
1035 struct regmap *sysc = data->sysc; in mtmips_assert_device()
1044 struct regmap *sysc = data->sysc; in mtmips_deassert_device()
1064 unsigned long id = reset_spec->args[0]; in mtmips_rst_xlate()
1066 if (id == 0 || id >= rcdev->nr_resets) in mtmips_rst_xlate()
1067 return -EINVAL; in mtmips_rst_xlate()
1084 return -ENOMEM; in mtmips_reset_init()
1086 rst_data->sysc = sysc; in mtmips_reset_init()
1087 rst_data->rcdev.ops = &reset_ops; in mtmips_reset_init()
1088 rst_data->rcdev.owner = THIS_MODULE; in mtmips_reset_init()
1089 rst_data->rcdev.nr_resets = 32; in mtmips_reset_init()
1090 rst_data->rcdev.of_reset_n_cells = 1; in mtmips_reset_init()
1091 rst_data->rcdev.of_xlate = mtmips_rst_xlate; in mtmips_reset_init()
1092 rst_data->rcdev.of_node = dev_of_node(dev); in mtmips_reset_init()
1094 return devm_reset_controller_register(dev, &rst_data->rcdev); in mtmips_reset_init()
1099 struct device_node *np = pdev->dev.of_node; in mtmips_clk_probe()
1100 struct device *dev = &pdev->dev; in mtmips_clk_probe()
1106 return -ENOMEM; in mtmips_clk_probe()
1108 priv->sysc = syscon_node_to_regmap(np); in mtmips_clk_probe()
1109 if (IS_ERR(priv->sysc)) in mtmips_clk_probe()
1110 return dev_err_probe(dev, PTR_ERR(priv->sysc), in mtmips_clk_probe()
1113 ret = mtmips_reset_init(dev, priv->sysc); in mtmips_clk_probe()
1123 .name = "mtmips-clk",