Lines Matching full:cmn_pll
161 struct clk_cmn_pll *cmn_pll = to_clk_cmn_pll(hw); in clk_cmn_pll_recalc_rate() local
168 regmap_read(cmn_pll->regmap, CMN_PLL_DIVIDER_CTRL, &val); in clk_cmn_pll_recalc_rate()
192 struct clk_cmn_pll *cmn_pll = to_clk_cmn_pll(hw); in clk_cmn_pll_set_rate() local
204 ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_REFCLK_CONFIG, in clk_cmn_pll_set_rate()
215 ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_REFCLK_CONFIG, in clk_cmn_pll_set_rate()
221 ret = regmap_update_bits(cmn_pll->regmap, CMN_PLL_REFCLK_SRC_SELECTION, in clk_cmn_pll_set_rate()
229 ret = regmap_set_bits(cmn_pll->regmap, CMN_PLL_CTRL, in clk_cmn_pll_set_rate()
238 ret = regmap_clear_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET, in clk_cmn_pll_set_rate()
244 ret = regmap_set_bits(cmn_pll->regmap, CMN_PLL_POWER_ON_AND_RESET, in clk_cmn_pll_set_rate()
250 return regmap_read_poll_timeout(cmn_pll->regmap, CMN_PLL_LOCKED, val, in clk_cmn_pll_set_rate()
266 struct clk_cmn_pll *cmn_pll; in ipq_cmn_pll_clk_hw_register() local
279 cmn_pll = devm_kzalloc(dev, sizeof(*cmn_pll), GFP_KERNEL); in ipq_cmn_pll_clk_hw_register()
280 if (!cmn_pll) in ipq_cmn_pll_clk_hw_register()
283 init.name = "cmn_pll"; in ipq_cmn_pll_clk_hw_register()
288 cmn_pll->hw.init = &init; in ipq_cmn_pll_clk_hw_register()
289 cmn_pll->regmap = regmap; in ipq_cmn_pll_clk_hw_register()
291 ret = devm_clk_hw_register(dev, &cmn_pll->hw); in ipq_cmn_pll_clk_hw_register()
295 return &cmn_pll->hw; in ipq_cmn_pll_clk_hw_register()