Lines Matching +full:0 +full:x8004

46 	{ 249600000, 2000000000, 0 },
51 .l = 0x1b,
52 .alpha = 0xb555,
53 .config_ctl_val = 0x20485699,
54 .config_ctl_hi_val = 0x00002261,
55 .config_ctl_hi1_val = 0x329a299c,
56 .user_ctl_val = 0x00000001,
57 .user_ctl_hi_val = 0x00000805,
58 .user_ctl_hi1_val = 0x00000000,
62 .offset = 0x0,
80 .l = 0x1a,
81 .alpha = 0xc555,
82 .config_ctl_val = 0x20485699,
83 .config_ctl_hi_val = 0x00002261,
84 .config_ctl_hi1_val = 0x329a299c,
85 .user_ctl_val = 0x00000001,
86 .user_ctl_hi_val = 0x00000805,
87 .user_ctl_hi1_val = 0x00000000,
91 .offset = 0x100,
108 { P_BI_TCXO, 0 },
124 { P_BI_TCXO, 0 },
142 F(200000000, P_GCC_GPU_GPLL0_DIV_CLK_SRC, 1.5, 0, 0),
147 .cmd_rcgr = 0x1120,
148 .mnd_width = 0,
161 F(266000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
162 F(390000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
163 F(490000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
164 F(650000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
165 F(770000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
166 F(840000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
167 F(900000000, P_GPU_CC_PLL0_OUT_EVEN, 2, 0, 0),
172 .cmd_rcgr = 0x101c,
173 .mnd_width = 0,
187 .halt_reg = 0x1078,
190 .enable_reg = 0x1078,
191 .enable_mask = BIT(0),
201 .halt_reg = 0x10a4,
204 .enable_reg = 0x10a4,
205 .enable_mask = BIT(0),
219 .halt_reg = 0x10a8,
222 .enable_reg = 0x10a8,
223 .enable_mask = BIT(0),
237 .halt_reg = 0x1098,
240 .enable_reg = 0x1098,
241 .enable_mask = BIT(0),
255 .halt_reg = 0x108c,
258 .enable_reg = 0x108c,
259 .enable_mask = BIT(0),
272 .halt_reg = 0x1004,
275 .enable_reg = 0x1004,
276 .enable_mask = BIT(0),
285 .halt_reg = 0x109c,
288 .enable_reg = 0x109c,
289 .enable_mask = BIT(0),
298 .halt_reg = 0x1060,
301 .enable_reg = 0x1060,
302 .enable_mask = BIT(0),
312 .halt_reg = 0x1054,
315 .enable_reg = 0x1054,
316 .enable_mask = BIT(0),
330 .halt_reg = 0x1064,
333 .enable_reg = 0x1064,
334 .enable_mask = BIT(0),
348 .halt_reg = 0x1090,
351 .enable_reg = 0x1090,
352 .enable_mask = BIT(0),
361 .gdscr = 0x106c,
362 .gds_hw_ctrl = 0x1540,
372 .gdscr = 0x100c,
373 .clamp_io_ctrl = 0x1508,
402 [GPU_GX_BCR] = { 0x1008 },
403 [GPU_ACD_BCR] = { 0x1160 },
404 [GPU_GX_ACD_MISC_BCR] = { 0x8004 },
416 .max_register = 0x9000,