25 struct clkdiv {  struct
34 static inline struct clkdiv *to_clkdiv(struct clk_hw *hw)  in to_clkdiv()  argument
36 	return container_of(hw, struct clkdiv, hw);  in to_clkdiv()
52 static bool is_spmi_pmic_clkdiv_enabled(struct clkdiv *clkdiv)  in is_spmi_pmic_clkdiv_enabled()  argument
56 	regmap_read(clkdiv->regmap, clkdiv->base + REG_EN_CTL, &val);  in is_spmi_pmic_clkdiv_enabled()
62 __spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable,  in __spmi_pmic_clkdiv_set_enable_state()  argument
66 	unsigned int ns = clkdiv->cxo_period_ns;  in __spmi_pmic_clkdiv_set_enable_state()
69 	ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_EN_CTL,  in __spmi_pmic_clkdiv_set_enable_state()
82 static int spmi_pmic_clkdiv_set_enable_state(struct clkdiv *clkdiv, bool enable)  in spmi_pmic_clkdiv_set_enable_state()  argument
86 	regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor);  in spmi_pmic_clkdiv_set_enable_state()
89 	return __spmi_pmic_clkdiv_set_enable_state(clkdiv, enable, div_factor);  in spmi_pmic_clkdiv_set_enable_state()
94 	struct clkdiv *clkdiv = to_clkdiv(hw);  in clk_spmi_pmic_div_enable()  local
98 	spin_lock_irqsave(&clkdiv->lock, flags);  in clk_spmi_pmic_div_enable()
99 	ret = spmi_pmic_clkdiv_set_enable_state(clkdiv, true);  in clk_spmi_pmic_div_enable()
100 	spin_unlock_irqrestore(&clkdiv->lock, flags);  in clk_spmi_pmic_div_enable()
107 	struct clkdiv *clkdiv = to_clkdiv(hw);  in clk_spmi_pmic_div_disable()  local
110 	spin_lock_irqsave(&clkdiv->lock, flags);  in clk_spmi_pmic_div_disable()
111 	spmi_pmic_clkdiv_set_enable_state(clkdiv, false);  in clk_spmi_pmic_div_disable()
112 	spin_unlock_irqrestore(&clkdiv->lock, flags);  in clk_spmi_pmic_div_disable()
130 	struct clkdiv *clkdiv = to_clkdiv(hw);  in clk_spmi_pmic_div_recalc_rate()  local
133 	regmap_read(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1, &div_factor);  in clk_spmi_pmic_div_recalc_rate()
142 	struct clkdiv *clkdiv = to_clkdiv(hw);  in clk_spmi_pmic_div_set_rate()  local
147 	guard(spinlock_irqsave)(&clkdiv->lock);  in clk_spmi_pmic_div_set_rate()
149 	enabled = is_spmi_pmic_clkdiv_enabled(clkdiv);  in clk_spmi_pmic_div_set_rate()
151 		ret = spmi_pmic_clkdiv_set_enable_state(clkdiv, false);  in clk_spmi_pmic_div_set_rate()
156 	ret = regmap_update_bits(clkdiv->regmap, clkdiv->base + REG_DIV_CTL1,  in clk_spmi_pmic_div_set_rate()
162 		ret = __spmi_pmic_clkdiv_set_enable_state(clkdiv, true,  in clk_spmi_pmic_div_set_rate()
177 	struct clkdiv	clks[] __counted_by(nclks);
199 	struct clkdiv *clkdiv;  in spmi_pmic_clkdiv_probe()  local
251 	for (i = 0, clkdiv = cc->clks; i < nclks; i++) {  in spmi_pmic_clkdiv_probe()
254 		spin_lock_init(&clkdiv[i].lock);  in spmi_pmic_clkdiv_probe()
255 		clkdiv[i].base = start + i * 0x100;  in spmi_pmic_clkdiv_probe()
256 		clkdiv[i].regmap = regmap;  in spmi_pmic_clkdiv_probe()
257 		clkdiv[i].cxo_period_ns = NSEC_PER_SEC / cxo_hz;  in spmi_pmic_clkdiv_probe()
258 		clkdiv[i].hw.init = &init;  in spmi_pmic_clkdiv_probe()
260 		ret = devm_clk_hw_register(dev, &clkdiv[i].hw);  in spmi_pmic_clkdiv_probe()
269 	{ .compatible = "qcom,spmi-clkdiv" },
276 		.name	= "qcom,spmi-pmic-clkdiv",
283 MODULE_DESCRIPTION("QCOM SPMI PMIC clkdiv driver");