10 #include <linux/regmap.h>
389 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
395 		ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in wait_for_pll()
434 static void clk_alpha_pll_write_config(struct regmap *regmap, unsigned int reg,  in clk_alpha_pll_write_config()  argument
438 		regmap_write(regmap, reg, val);  in clk_alpha_pll_write_config()
441 void clk_alpha_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_alpha_pll_configure()  argument
446 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_alpha_pll_configure()
447 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_alpha_pll_configure()
448 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_alpha_pll_configure()
451 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_alpha_pll_configure()
455 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_alpha_pll_configure()
477 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_alpha_pll_configure()
480 		regmap_update_bits(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
484 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_alpha_pll_configure()
488 		regmap_update_bits(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
492 		clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_alpha_pll_configure()
496 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_alpha_pll_configure()
506 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_enable()
515 	ret = regmap_write(pll->clkr.regmap, PLL_MODE(pll), val);  in clk_alpha_pll_hwfsm_enable()
531 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_hwfsm_disable()
536 		ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
547 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_hwfsm_disable()
561 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in pll_is_enabled()
585 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_enable()
601 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
613 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
622 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),  in clk_alpha_pll_enable()
636 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_disable()
647 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
654 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), mask, 0);  in clk_alpha_pll_disable()
712 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_alpha_pll_recalc_rate()
714 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_recalc_rate()
716 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);  in clk_alpha_pll_recalc_rate()
718 			regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_recalc_rate()
738 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &mode);  in __clk_alpha_pll_update_latch()
741 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in __clk_alpha_pll_update_latch()
759 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE, 0);  in __clk_alpha_pll_update_latch()
803 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in __clk_alpha_pll_set_rate()
809 		regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll), a >> 32);  in __clk_alpha_pll_set_rate()
811 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __clk_alpha_pll_set_rate()
814 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
819 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_alpha_pll_set_rate()
857 void clk_huayra_2290_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_huayra_2290_pll_configure()  argument
862 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_huayra_2290_pll_configure()
863 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_huayra_2290_pll_configure()
864 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_huayra_2290_pll_configure()
865 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_huayra_2290_pll_configure()
866 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_huayra_2290_pll_configure()
867 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_huayra_2290_pll_configure()
868 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_huayra_2290_pll_configure()
869 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_huayra_2290_pll_configure()
870 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_huayra_2290_pll_configure()
873 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_huayra_2290_pll_configure()
874 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_huayra_2290_pll_configure()
880 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_huayra_2290_pll_configure()
881 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_huayra_2290_pll_configure()
887 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_huayra_2290_pll_configure()
945 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_huayra_recalc_rate()
946 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_recalc_rate()
949 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);  in alpha_pll_huayra_recalc_rate()
1000 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in alpha_pll_huayra_set_rate()
1003 		regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &cur_alpha);  in alpha_pll_huayra_set_rate()
1016 		regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
1022 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_huayra_set_rate()
1023 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in alpha_pll_huayra_set_rate()
1026 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
1029 		regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in alpha_pll_huayra_set_rate()
1044 				struct regmap *regmap)  in trion_pll_is_enabled()  argument
1049 	ret = regmap_read(regmap, PLL_MODE(pll), &mode_val);  in trion_pll_is_enabled()
1050 	ret |= regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in trion_pll_is_enabled()
1061 	return trion_pll_is_enabled(pll, pll->clkr.regmap);  in clk_trion_pll_is_enabled()
1067 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_enable()  local
1071 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_enable()
1084 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_trion_pll_enable()
1091 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_enable()
1097 	return regmap_update_bits(regmap, PLL_MODE(pll),  in clk_trion_pll_enable()
1104 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_disable()  local
1108 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in clk_trion_pll_disable()
1119 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_trion_pll_disable()
1124 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_disable()
1130 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_disable()
1131 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_disable()
1140 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_trion_pll_recalc_rate()
1141 	regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);  in clk_trion_pll_recalc_rate()
1199 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_recalc_rate()
1246 	regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);  in clk_alpha_pll_postdiv_round_ro_rate()
1267 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_set_rate()
1285 void clk_fabia_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_fabia_pll_configure()  argument
1290 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_fabia_pll_configure()
1291 	clk_alpha_pll_write_config(regmap, PLL_FRAC(pll), config->alpha);  in clk_fabia_pll_configure()
1292 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_fabia_pll_configure()
1294 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_fabia_pll_configure()
1296 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_fabia_pll_configure()
1298 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_fabia_pll_configure()
1300 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_fabia_pll_configure()
1302 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_fabia_pll_configure()
1308 		regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_fabia_pll_configure()
1312 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_FSM_LEGACY_MODE,  in clk_fabia_pll_configure()
1315 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_fabia_pll_configure()
1318 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_fabia_pll_configure()
1327 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_enable()  local
1329 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_enable()
1341 	ret = regmap_read(regmap, PLL_OPMODE(pll), &opmode_val);  in alpha_pll_fabia_enable()
1349 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_enable()
1353 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_enable()
1357 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N,  in alpha_pll_fabia_enable()
1362 	ret = regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_fabia_enable()
1370 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll),  in alpha_pll_fabia_enable()
1375 	return regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL,  in alpha_pll_fabia_enable()
1384 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_fabia_disable()  local
1386 	ret = regmap_read(regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_disable()
1396 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_fabia_disable()
1401 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_fabia_disable()
1406 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_fabia_disable()
1415 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in alpha_pll_fabia_recalc_rate()
1416 	regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);  in alpha_pll_fabia_recalc_rate()
1454 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in alpha_pll_fabia_set_rate()
1455 	regmap_write(pll->clkr.regmap, PLL_FRAC(pll), a);  in alpha_pll_fabia_set_rate()
1472 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_fabia_prepare()
1501 	regmap_write(pll->clkr.regmap, PLL_CAL_L_VAL(pll), cal_l);  in alpha_pll_fabia_prepare()
1542 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in clk_alpha_pll_postdiv_fabia_recalc_rate()
1563 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_recalc_rate()  local
1566 	regmap_read(regmap, PLL_USER_CTL(pll), &val);  in clk_trion_pll_postdiv_recalc_rate()
1596 	struct regmap *regmap = pll->clkr.regmap;  in clk_trion_pll_postdiv_set_rate()  local
1607 	return regmap_update_bits(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_postdiv_set_rate()
1638 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in clk_alpha_pll_postdiv_fabia_set_rate()
1653 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_postdiv_fabia_set_rate()
1669  * @regmap: register map
1672 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_trion_pll_configure()  argument
1679 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_trion_pll_configure()
1684 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_trion_pll_configure()
1685 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_trion_pll_configure()
1686 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_trion_pll_configure()
1687 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_trion_pll_configure()
1689 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_trion_pll_configure()
1691 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_trion_pll_configure()
1693 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_trion_pll_configure()
1695 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_trion_pll_configure()
1697 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_trion_pll_configure()
1699 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_trion_pll_configure()
1701 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_trion_pll_configure()
1703 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_trion_pll_configure()
1706 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_UPDATE_BYPASS,  in clk_trion_pll_configure()
1710 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_trion_pll_configure()
1713 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_trion_pll_configure()
1716 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_trion_pll_configure()
1731 	regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val);  in __alpha_pll_trion_prepare()
1768 	regmap_update_bits(pll->clkr.regmap, PLL_L_VAL(pll), LUCID_EVO_PLL_L_VAL_MASK,  l);  in __alpha_pll_trion_set_rate()
1769 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in __alpha_pll_trion_set_rate()
1772 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, latch_bit);  in __alpha_pll_trion_set_rate()
1778 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in __alpha_pll_trion_set_rate()
1785 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), latch_bit, 0);  in __alpha_pll_trion_set_rate()
1835 void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_agera_pll_configure()  argument
1838 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_agera_pll_configure()
1839 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_agera_pll_configure()
1840 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_agera_pll_configure()
1842 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_agera_pll_configure()
1844 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_agera_pll_configure()
1846 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_agera_pll_configure()
1848 	clk_alpha_pll_write_config(regmap,  PLL_TEST_CTL_U(pll),  in clk_agera_pll_configure()
1868 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_agera_set_rate()
1869 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_agera_set_rate()
1891  * @regmap: register map
1894 void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_5lpe_pll_configure()  argument
1901 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_lucid_5lpe_pll_configure()
1906 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_lucid_5lpe_pll_configure()
1907 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);  in clk_lucid_5lpe_pll_configure()
1908 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_5lpe_pll_configure()
1909 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1911 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1913 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1915 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1917 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1919 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1921 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll),  in clk_lucid_5lpe_pll_configure()
1923 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll),  in clk_lucid_5lpe_pll_configure()
1925 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll),  in clk_lucid_5lpe_pll_configure()
1929 	regmap_update_bits(regmap, PLL_MODE(pll),  PLL_OUTCTRL, 0);  in clk_lucid_5lpe_pll_configure()
1932 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_5lpe_pll_configure()
1935 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_5lpe_pll_configure()
1945 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_enable()
1958 	if (trion_pll_is_enabled(pll, pll->clkr.regmap))  in alpha_pll_lucid_5lpe_enable()
1961 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_5lpe_enable()
1965 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_5lpe_enable()
1972 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_5lpe_enable()
1977 	return regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_5lpe_enable()
1986 	ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_5lpe_disable()
1997 	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_lucid_5lpe_disable()
2002 	ret = regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in alpha_pll_lucid_5lpe_disable()
2007 	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_lucid_5lpe_disable()
2022 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in alpha_pll_lucid_5lpe_prepare()
2052 	struct regmap *regmap = pll->clkr.regmap;  in __clk_lucid_pll_postdiv_set_rate()  local
2060 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in __clk_lucid_pll_postdiv_set_rate()
2082 	return regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in __clk_lucid_pll_postdiv_set_rate()
2119 void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_zonda_pll_configure()  argument
2122 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_zonda_pll_configure()
2123 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_zonda_pll_configure()
2124 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_zonda_pll_configure()
2125 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_zonda_pll_configure()
2126 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_zonda_pll_configure()
2127 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_zonda_pll_configure()
2128 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_zonda_pll_configure()
2129 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_zonda_pll_configure()
2130 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_zonda_pll_configure()
2131 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_zonda_pll_configure()
2132 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_zonda_pll_configure()
2134 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, 0);  in clk_zonda_pll_configure()
2137 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_configure()
2140 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_zonda_pll_configure()
2143 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_configure()
2150 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_enable()  local
2154 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_enable()
2165 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_BYPASSNL, PLL_BYPASSNL);  in clk_zonda_pll_enable()
2173 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_zonda_pll_enable()
2176 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in clk_zonda_pll_enable()
2178 	regmap_read(regmap, PLL_TEST_CTL(pll), &val);  in clk_zonda_pll_enable()
2189 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, ZONDA_PLL_OUT_MASK);  in clk_zonda_pll_enable()
2192 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in clk_zonda_pll_enable()
2200 	struct regmap *regmap = pll->clkr.regmap;  in clk_zonda_pll_disable()  local
2203 	regmap_read(regmap, PLL_MODE(pll), &val);  in clk_zonda_pll_disable()
2212 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_zonda_pll_disable()
2215 	regmap_update_bits(regmap, PLL_USER_CTL(pll), ZONDA_PLL_OUT_MASK, 0);  in clk_zonda_pll_disable()
2218 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N | PLL_BYPASSNL, 0);  in clk_zonda_pll_disable()
2221 	regmap_write(regmap, PLL_OPMODE(pll), 0x0);  in clk_zonda_pll_disable()
2253 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_zonda_pll_set_rate()
2254 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_zonda_pll_set_rate()
2263 	regmap_read(pll->clkr.regmap, PLL_TEST_CTL(pll), &test_ctl_val);  in clk_zonda_pll_set_rate()
2288 void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_evo_pll_configure()  argument
2297 	if (trion_pll_is_enabled(pll, regmap)) {  in clk_lucid_evo_pll_configure()
2303 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_evo_pll_configure()
2304 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_evo_pll_configure()
2305 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_evo_pll_configure()
2306 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2307 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2308 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_evo_pll_configure()
2309 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2310 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_evo_pll_configure()
2311 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_evo_pll_configure()
2312 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_evo_pll_configure()
2313 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_lucid_evo_pll_configure()
2316 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_evo_pll_configure()
2319 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_evo_pll_configure()
2320 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_evo_pll_configure()
2324 void clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_lucid_ole_pll_configure()  argument
2331 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), lval);  in clk_lucid_ole_pll_configure()
2332 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_lucid_ole_pll_configure()
2333 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_lucid_ole_pll_configure()
2334 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2335 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_lucid_ole_pll_configure()
2336 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_lucid_ole_pll_configure()
2337 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2338 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_lucid_ole_pll_configure()
2339 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_lucid_ole_pll_configure()
2340 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_lucid_ole_pll_configure()
2341 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_lucid_ole_pll_configure()
2344 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_lucid_ole_pll_configure()
2347 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_lucid_ole_pll_configure()
2348 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in clk_lucid_ole_pll_configure()
2355 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_enable()  local
2359 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in alpha_pll_lucid_evo_enable()
2372 	if (trion_pll_is_enabled(pll, regmap))  in alpha_pll_lucid_evo_enable()
2375 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_lucid_evo_enable()
2380 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_lucid_evo_enable()
2387 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, PLL_OUT_MASK);  in alpha_pll_lucid_evo_enable()
2392 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_lucid_evo_enable()
2404 	struct regmap *regmap = pll->clkr.regmap;  in _alpha_pll_lucid_evo_disable()  local
2408 	ret = regmap_read(regmap, PLL_USER_CTL(pll), &val);  in _alpha_pll_lucid_evo_disable()
2419 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in _alpha_pll_lucid_evo_disable()
2424 	ret = regmap_update_bits(regmap, PLL_USER_CTL(pll), PLL_OUT_MASK, 0);  in _alpha_pll_lucid_evo_disable()
2429 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in _alpha_pll_lucid_evo_disable()
2432 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, 0);  in _alpha_pll_lucid_evo_disable()
2443 	regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val);  in _alpha_pll_lucid_evo_prepare()
2484 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_lucid_evo_recalc_rate()  local
2487 	regmap_read(regmap, PLL_L_VAL(pll), &l);  in alpha_pll_lucid_evo_recalc_rate()
2489 	regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);  in alpha_pll_lucid_evo_recalc_rate()
2541 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_pongo_elu_prepare()  local
2545 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_pongo_elu_prepare()
2546 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_pongo_elu_prepare()
2547 	regmap_update_bits(regmap, PLL_MODE(pll), PONGO_XO_PRESENT, PONGO_XO_PRESENT);  in alpha_pll_pongo_elu_prepare()
2549 	/* Set regmap for wait_for_pll() */  in alpha_pll_pongo_elu_prepare()
2550 	pll->clkr.regmap = regmap;  in alpha_pll_pongo_elu_prepare()
2554 		regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_pongo_elu_prepare()
2559 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_pongo_elu_prepare()
2562 	regmap_update_bits(regmap, PLL_MODE(pll), PONGO_CLOCK_SELECT,  in alpha_pll_pongo_elu_prepare()
2571 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_pongo_elu_enable()  local
2575 	if (trion_pll_is_enabled(pll, regmap))  in alpha_pll_pongo_elu_enable()
2578 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N);  in alpha_pll_pongo_elu_enable()
2583 	regmap_write(regmap, PLL_OPMODE(pll), PLL_RUN);  in alpha_pll_pongo_elu_enable()
2590 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, PLL_OUTCTRL);  in alpha_pll_pongo_elu_enable()
2603 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_pongo_elu_disable()  local
2607 	ret = regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in alpha_pll_pongo_elu_disable()
2612 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in alpha_pll_pongo_elu_disable()
2619 	struct regmap *regmap = pll->clkr.regmap;  in alpha_pll_pongo_elu_recalc_rate()  local
2622 	if (regmap_read(regmap, PLL_L_VAL(pll), &l))  in alpha_pll_pongo_elu_recalc_rate()
2639 				 struct regmap *regmap,  in clk_pongo_elu_pll_configure()  argument
2644 	regmap_update_bits(regmap, PLL_USER_CTL(pll), PONGO_PLL_OUT_MASK,  in clk_pongo_elu_pll_configure()
2647 	if (trion_pll_is_enabled(pll, regmap))  in clk_pongo_elu_pll_configure()
2650 	if (regmap_read(regmap, PLL_L_VAL(pll), &val))  in clk_pongo_elu_pll_configure()
2656 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_pongo_elu_pll_configure()
2657 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_pongo_elu_pll_configure()
2658 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_pongo_elu_pll_configure()
2659 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_pongo_elu_pll_configure()
2660 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_pongo_elu_pll_configure()
2661 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U2(pll), config->config_ctl_hi2_val);  in clk_pongo_elu_pll_configure()
2662 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll),  in clk_pongo_elu_pll_configure()
2664 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_pongo_elu_pll_configure()
2665 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_pongo_elu_pll_configure()
2666 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_pongo_elu_pll_configure()
2667 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_pongo_elu_pll_configure()
2668 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U2(pll), config->test_ctl_hi2_val);  in clk_pongo_elu_pll_configure()
2669 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U3(pll), config->test_ctl_hi3_val);  in clk_pongo_elu_pll_configure()
2672 	regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0);  in clk_pongo_elu_pll_configure()
2676 void clk_rivian_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_rivian_evo_pll_configure()  argument
2679 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_rivian_evo_pll_configure()
2680 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2681 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_rivian_evo_pll_configure()
2682 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_rivian_evo_pll_configure()
2683 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2684 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_rivian_evo_pll_configure()
2685 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_rivian_evo_pll_configure()
2686 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_rivian_evo_pll_configure()
2688 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_rivian_evo_pll_configure()
2690 	regmap_update_bits(regmap, PLL_MODE(pll),  in clk_rivian_evo_pll_configure()
2702 	regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);  in clk_rivian_evo_pll_recalc_rate()
2734 void clk_stromer_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_stromer_pll_configure()  argument
2739 	regmap_write(regmap, PLL_L_VAL(pll), config->l);  in clk_stromer_pll_configure()
2740 	regmap_write(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_stromer_pll_configure()
2741 	regmap_write(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_stromer_pll_configure()
2744 		regmap_write(regmap, PLL_CONFIG_CTL_U(pll),  in clk_stromer_pll_configure()
2748 		regmap_write(regmap, PLL_ALPHA_VAL_U(pll), config->alpha_hi);  in clk_stromer_pll_configure()
2770 	regmap_update_bits(regmap, PLL_USER_CTL(pll), mask, val);  in clk_stromer_pll_configure()
2779 	regmap_update_bits(regmap, PLL_USER_CTL_U(pll), mask_u, val_u);  in clk_stromer_pll_configure()
2780 	regmap_write(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_stromer_pll_configure()
2781 	regmap_write(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_stromer_pll_configure()
2784 		qcom_pll_set_fsm_mode(regmap, PLL_MODE(pll), 6, 0);  in clk_stromer_pll_configure()
2810 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_set_rate()
2813 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_set_rate()
2814 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_set_rate()
2817 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_set_rate()
2828 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_UPDATE,  in clk_alpha_pll_stromer_set_rate()
2859 	ret = regmap_read(pll->clkr.regmap, PLL_MODE(pll), &pll_mode);  in clk_alpha_pll_stromer_plus_set_rate()
2863 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), 0);  in clk_alpha_pll_stromer_plus_set_rate()
2868 	regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);  in clk_alpha_pll_stromer_plus_set_rate()
2873 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);  in clk_alpha_pll_stromer_plus_set_rate()
2874 	regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL_U(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2877 	regmap_update_bits(pll->clkr.regmap, PLL_USER_CTL(pll),  in clk_alpha_pll_stromer_plus_set_rate()
2880 	regmap_write(pll->clkr.regmap, PLL_MODE(pll), PLL_BYPASSNL);  in clk_alpha_pll_stromer_plus_set_rate()
2884 	regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_RESET_N,  in clk_alpha_pll_stromer_plus_set_rate()
2898 		regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll), PLL_OUTCTRL,  in clk_alpha_pll_stromer_plus_set_rate()
2914 void clk_regera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,  in clk_regera_pll_configure()  argument
2917 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);  in clk_regera_pll_configure()
2918 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);  in clk_regera_pll_configure()
2919 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val);  in clk_regera_pll_configure()
2920 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val);  in clk_regera_pll_configure()
2921 	clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val);  in clk_regera_pll_configure()
2922 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val);  in clk_regera_pll_configure()
2923 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val);  in clk_regera_pll_configure()
2924 	clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), config->user_ctl_hi1_val);  in clk_regera_pll_configure()
2925 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val);  in clk_regera_pll_configure()
2926 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val);  in clk_regera_pll_configure()
2927 	clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val);  in clk_regera_pll_configure()
2930 	regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY);  in clk_regera_pll_configure()