Lines Matching +full:sm6375 +full:- +full:gcc

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
1023 	tristate "SM6375 Display Clock Controller"
1028 	  SM6375 devices.
1100 	tristate "SM6375 Global Clock Controller"
1104 	  Support for the global clock controller on SM6375 devices.
1209 	tristate "SM6375 Graphics Clock Controller"
1213 	  Support for the graphics clock controller on SM6375 devices.
1287 	  Say Y if you want to toggle LPASS-adjacent resets within
1386 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1388 	  Support for the high-frequency PLLs present on Qualcomm devices.
1395 	  Support for the Krait ACC and GCC clock controllers. Say Y