Lines Matching +full:gcc +full:- +full:sm8350

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
1003 	tristate "SM8150/SM8250/SM8350 Display Clock Controller"
1008 	  SM8150/SM8250/SM8350 devices.
1136 	tristate "SM8350 Global Clock Controller"
1140 	  Support for the global clock controller on SM8350 devices.
1245 	tristate "SM8350 Graphics Clock Controller"
1249 	  Support for the graphics clock controller on SM8350 devices.
1287 	  Say Y if you want to toggle LPASS-adjacent resets within
1356 	tristate "SM8350 Video Clock Controller"
1361 	  Support for the video clock controller on SM8350 devices.
1386 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1388 	  Support for the high-frequency PLLs present on Qualcomm devices.
1395 	  Support for the Krait ACC and GCC clock controllers. Say Y