Lines Matching +full:gcc +full:- +full:sm8250

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
931 	tristate "SM8250 Camera Clock Controller"
935 	  Support for the camera clock controller on SM8250 devices.
1003 	tristate "SM8150/SM8250/SM8350 Display Clock Controller"
1008 	  SM8150/SM8250/SM8350 devices.
1127 	tristate "SM8250 Global Clock Controller"
1131 	  Support for the global clock controller on SM8250 devices.
1236 	tristate "SM8250 Graphics Clock Controller"
1240 	  Support for the graphics clock controller on SM8250 devices.
1287 	  Say Y if you want to toggle LPASS-adjacent resets within
1346 	tristate "SM8250 Video Clock Controller"
1351 	  Support for the video clock controller on SM8250 devices.
1386 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1388 	  Support for the high-frequency PLLs present on Qualcomm devices.
1395 	  Support for the Krait ACC and GCC clock controllers. Say Y
1408 	tristate "SM8250 GFM LPASS Clocks"
1412           subsystem (LPASS) clocks found on SM8250 SoCs.