Lines Matching +full:gcc +full:- +full:sm6125

1 # SPDX-License-Identifier: GPL-2.0-only
206 	  CMN PLL consumes the AHB/SYS clocks from GCC and supplies
207 	  the output clocks to the networking hardware and GCC blocks.
983 	tristate "SM6125 Display Clock Controller"
988 	  SM6125 devices.
1082 	tristate "SM6125 Global Clock Controller"
1086 	  Support for the global clock controller on SM6125 devices.
1200 	tristate "SM6125 Graphics Clock Controller"
1204 	  Support for the graphics clock controller on SM6125 devices.
1287 	  Say Y if you want to toggle LPASS-adjacent resets within
1386 	tristate "High-Frequency PLL (HFPLL) Clock Controller"
1388 	  Support for the high-frequency PLLs present on Qualcomm devices.
1395 	  Support for the Krait ACC and GCC clock controllers. Say Y