1 // SPDX-License-Identifier: GPL-2.0+
8 #include <linux/clk-provider.h>
16 #include "clk-scu.h"
25  * struct clk_lpcg_scu - Description of LPCG clock
29  * @bit_idx: bit index of this LPCG clock
46 /* e10858 -LPCG clock gating register synchronization errata */
57 		 * back-to-back writes.  in lpcg_e10858_writel()
77 	reg = readl_relaxed(clk->reg);  in clk_lpcg_scu_enable()
78 	reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);  in clk_lpcg_scu_enable()
81 	if (clk->hw_gate)  in clk_lpcg_scu_enable()
84 	reg |= val << clk->bit_idx;  in clk_lpcg_scu_enable()
86 	lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg);  in clk_lpcg_scu_enable()
101 	reg = readl_relaxed(clk->reg);  in clk_lpcg_scu_disable()
102 	reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);  in clk_lpcg_scu_disable()
103 	lpcg_e10858_writel(clk_hw_get_rate(hw), clk->reg, reg);  in clk_lpcg_scu_disable()
124 		return ERR_PTR(-ENOMEM);  in __imx_clk_lpcg_scu()
126 	clk->reg = reg;  in __imx_clk_lpcg_scu()
127 	clk->bit_idx = bit_idx;  in __imx_clk_lpcg_scu()
128 	clk->hw_gate = hw_gate;  in __imx_clk_lpcg_scu()
136 	clk->hw.init = &init;  in __imx_clk_lpcg_scu()
138 	hw = &clk->hw;  in __imx_clk_lpcg_scu()
156 	clk_hw_unregister(&clk->hw);  in imx_clk_lpcg_scu_unregister()
164 	if (!strncmp("hdmi_lpcg", clk_hw_get_name(&clk->hw), strlen("hdmi_lpcg")))  in imx_clk_lpcg_scu_suspend()
167 	clk->state = readl_relaxed(clk->reg);  in imx_clk_lpcg_scu_suspend()
168 	dev_dbg(dev, "save lpcg state 0x%x\n", clk->state);  in imx_clk_lpcg_scu_suspend()
177 	if (!strncmp("hdmi_lpcg", clk_hw_get_name(&clk->hw), strlen("hdmi_lpcg")))  in imx_clk_lpcg_scu_resume()
180 	writel(clk->state, clk->reg);  in imx_clk_lpcg_scu_resume()
181 	lpcg_e10858_writel(0, clk->reg, clk->state);  in imx_clk_lpcg_scu_resume()
182 	dev_dbg(dev, "restore lpcg state 0x%x\n", clk->state);  in imx_clk_lpcg_scu_resume()