Lines Matching +full:edma2 +full:- +full:err

1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
7 #include <linux/err.h>
14 #include <dt-bindings/clock/imx93-clock.h>
186 	{ IMX93_CLK_EDMA2_GATE,		"edma2",	"wakeup_axi_root",	0x8580, },
276 	struct device *dev = &pdev->dev;  in imx93_clocks_probe()
277 	struct device_node *np = dev->of_node;  in imx93_clocks_probe()
282 	const unsigned long plat = (unsigned long)device_get_match_data(&pdev->dev);  in imx93_clocks_probe()
287 		return -ENOMEM;  in imx93_clocks_probe()
289 	clk_hw_data->num = IMX93_CLK_END;  in imx93_clocks_probe()
290 	clks = clk_hw_data->hws;  in imx93_clocks_probe()
307 	np = of_find_compatible_node(NULL, NULL, "fsl,imx93-anatop");  in imx93_clocks_probe()
323 	np = dev->of_node;  in imx93_clocks_probe()
332 		if (!root->plat || root->plat & plat)  in imx93_clocks_probe()
333 			clks[root->clk] = imx93_clk_composite_flags(root->name,  in imx93_clocks_probe()
334 								    parent_names[root->sel],  in imx93_clocks_probe()
335 								    4, base + root->off, 3,  in imx93_clocks_probe()
336 								    root->flags);  in imx93_clocks_probe()
341 		if (!ccgr->plat || ccgr->plat & plat)  in imx93_clocks_probe()
342 			clks[ccgr->clk] = imx93_clk_gate(NULL,  in imx93_clocks_probe()
343 							 ccgr->name, ccgr->parent_name,  in imx93_clocks_probe()
344 							 ccgr->flags, base + ccgr->off, 0, 1, 1, 3,  in imx93_clocks_probe()
345 							 ccgr->shared_count);  in imx93_clocks_probe()
351 						  clks[IMX93_CLK_A55_SEL]->clk,  in imx93_clocks_probe()
352 						  clks[IMX93_CLK_A55_SEL]->clk,  in imx93_clocks_probe()
353 						  clks[IMX93_CLK_ARM_PLL]->clk,  in imx93_clocks_probe()
354 						  clks[IMX93_CLK_A55_GATE]->clk);  in imx93_clocks_probe()
375 	{ .compatible = "fsl,imx93-ccm", .data = (void *)PLAT_IMX93 },
376 	{ .compatible = "fsl,imx91-ccm", .data = (void *)PLAT_IMX91 },
384 		.name = "imx93-ccm",
391 MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");