107 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_enable()  local
108 	u32 val = readl(gck->reg);  in lan966x_gck_enable()
111 	writel(val, gck->reg);  in lan966x_gck_enable()
118 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_disable()  local
119 	u32 val = readl(gck->reg);  in lan966x_gck_disable()
122 	writel(val, gck->reg);  in lan966x_gck_disable()
129 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_set_rate()  local
130 	u32 div, val = readl(gck->reg);  in lan966x_gck_set_rate()
139 	writel(val, gck->reg);  in lan966x_gck_set_rate()
147 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_recalc_rate()  local
148 	u32 div, val = readl(gck->reg);  in lan966x_gck_recalc_rate()
180 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_get_parent()  local
181 	u32 val = readl(gck->reg);  in lan966x_gck_get_parent()
188 	struct lan966x_gck *gck = to_lan966x_gck(hw);  in lan966x_gck_set_parent()  local
189 	u32 val = readl(gck->reg);  in lan966x_gck_set_parent()
193 	writel(val, gck->reg);  in lan966x_gck_set_parent()
305 	{ .compatible = "microchip,lan966x-gck", .data = &lan966x_desc },
306 	{ .compatible = "microchip,lan9691-gck", .data = &lan969x_desc },