Lines Matching +full:enable +full:- +full:soft +full:- +full:reset

3 * 3780i.h -- declarations for 3780i.c
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
42 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
45 * 10/23/2000 - Alpha Release
62 #define DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-stor…
63 #define DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
76 unsigned short EnableDspInt:1; /* RW: Enable DSP to X86 ISA interrupt 0=mask it, 1=enable it */
77 unsigned short MemAutoInc:1; /* RW: Memory address auto increment, 0=disable, 1=enable */
78 unsigned short IoAutoInc:1; /* RW: I/O address auto increment, 0=disable, 1=enable */
92 #define DSP_PowerMgCfgIndex 0x0010 /* Low poser suspend/resume enable */
104 unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=false, 1=true */ member
112 unsigned char AccessMode:1; /* RW: 16-bit register access method 0=byte, 1=word */
117 unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=false, 1=true */ member
136 unsigned char GateIOCHRDY:1; /* RW: Enable IOCHRDY gating: 0=false, 1=true */
141 unsigned char Enable:1; /* RW: Enable low power suspend/resume 0=false, 1=true */ member
165 unsigned short ResetCore:1; /* RW: Reset MSP core interface */
175 unsigned short Memory:1; /* RW: Reset memory interface */
176 unsigned short SerialPort1:1; /* RW: Reset serial port 1 interface */
177 unsigned short SerialPort2:1; /* RW: Reset serial port 2 interface */
178 unsigned short SerialPort3:1; /* RW: Reset serial port 3 interface */
179 unsigned short Gpio:1; /* RW: Reset GPIO interface */
180 unsigned short Dma:1; /* RW: Reset DMA interface */
181 unsigned short SoundBlaster:1; /* RW: Reset soundblaster interface */
182 unsigned short Uart:1; /* RW: Reset UART interface */
183 unsigned short Midi:1; /* RW: Reset MIDI interface */
184 unsigned short IsaMaster:1; /* RW: Reset ISA master interface */
305 unsigned short usChipletEnable; /* Used with the chip reset register to enable specific chiplets */
309 unsigned char ucIER; /* Interrupt enable register */