Lines Matching full:rw
68 unsigned char ClockControl:1; /* RW: Clock control: 0=normal, 1=stop 3780i clocks */
69 unsigned char SoftReset:1; /* RW: Soft reset 0=normal, 1=soft reset active */
70 unsigned char ConfigMode:1; /* RW: Configuration mode, 0=normal, 1=config mode */
76 unsigned short EnableDspInt:1; /* RW: Enable DSP to X86 ISA interrupt 0=mask it, 1=enable it */
77 unsigned short MemAutoInc:1; /* RW: Memory address auto increment, 0=disable, 1=enable */
78 unsigned short IoAutoInc:1; /* RW: I/O address auto increment, 0=disable, 1=enable */
79 unsigned short DiagnosticMode:1; /* RW: Disgnostic mode 0=nromal, 1=diagnostic mode */
96 unsigned char IrqActiveLow:1; /* RW: IRQ active high or low: 0=high, 1=low */
97 unsigned char IrqPulse:1; /* RW: IRQ pulse or level: 0=level, 1=pulse */
98 unsigned char Irq:3; /* RW: IRQ selection */
99 unsigned char BaseIO:2; /* RW: Base I/O selection */
104 unsigned char Enable:1; /* RW: Enable I/O and IRQ: 0=false, 1=true */
109 unsigned char IrqActiveLow:1; /* RW: IRQ active high=0 or low=1 */
110 unsigned char IrqPulse:1; /* RW: IRQ pulse=1 or level=0 */
111 unsigned char Irq:3; /* RW: IRQ selection */
112 unsigned char AccessMode:1; /* RW: 16-bit register access method 0=byte, 1=word */
117 unsigned char Enable:1; /* RW: enable I/O and IRQ: 0=false, 1=true */
123 unsigned char Dma:3; /* RW: DMA channel selection */
124 unsigned char NumTransfers:2; /* RW: Maximum # of transfers once being granted the ISA bus */
125 …unsigned char ReRequest:2; /* RW: Minimum delay between releasing the ISA bus and requesting it ag…
126 unsigned char MEMCS16:1; /* RW: ISA signal MEMCS16: 0=disabled, 1=enabled */
130 unsigned char IsaMemCmdWidth:2; /* RW: ISA memory command width */
136 unsigned char GateIOCHRDY:1; /* RW: Enable IOCHRDY gating: 0=false, 1=true */
141 unsigned char Enable:1; /* RW: Enable low power suspend/resume 0=false, 1=true */
146 unsigned char LoadValue:8; /* RW: HBUS timer load value */
163 unsigned short NMI:1; /* RW: non maskable interrupt */
164 unsigned short Halt:1; /* RW: Halt MSP clock */
165 unsigned short ResetCore:1; /* RW: Reset MSP core interface */
170 unsigned short DisableTimeout:1; /* RW: Disable LBus timeout */
175 unsigned short Memory:1; /* RW: Reset memory interface */
176 unsigned short SerialPort1:1; /* RW: Reset serial port 1 interface */
177 unsigned short SerialPort2:1; /* RW: Reset serial port 2 interface */
178 unsigned short SerialPort3:1; /* RW: Reset serial port 3 interface */
179 unsigned short Gpio:1; /* RW: Reset GPIO interface */
180 unsigned short Dma:1; /* RW: Reset DMA interface */
181 unsigned short SoundBlaster:1; /* RW: Reset soundblaster interface */
182 unsigned short Uart:1; /* RW: Reset UART interface */
183 unsigned short Midi:1; /* RW: Reset MIDI interface */
184 unsigned short IsaMaster:1; /* RW: Reset ISA master interface */
189 unsigned short N_Divisor:6; /* RW: (N) PLL output clock divisor */
191 unsigned short M_Multiplier:6; /* RW: (M) PLL feedback clock multiplier */
196 unsigned short PllBypass:1; /* RW: PLL Bypass */