17 #define NVIDIA_0_APSIZE		0x80
18 #define NVIDIA_1_WBC		0xf0
19 #define NVIDIA_2_GARTCTRL	0xd0
20 #define NVIDIA_2_APBASE		0xd8
21 #define NVIDIA_2_APLIMIT	0xdc
22 #define NVIDIA_2_ATTBASE(i)	(0xe0 + (i) * 4)
23 #define NVIDIA_3_APBASE		0x50
24 #define NVIDIA_3_APLIMIT	0x54
45 	size_value &= 0x0f;  in nvidia_fetch_size()
48 	for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {  in nvidia_fetch_size()
57 	return 0;  in nvidia_fetch_size()
60 #define SYSCFG          0xC0010010
61 #define IORR_BASE0      0xC0010016
62 #define IORR_MASK0      0xC0010017
75 	for (iorr_addr = 0; iorr_addr < AMD_K7_NUM_IORR; iorr_addr++) {  in nvidia_init_iorr()
79 		if ((base_lo & 0xfffff000) == (base & 0xfffff000))  in nvidia_init_iorr()
82 		if ((mask_lo & 0x00000800) == 0)  in nvidia_init_iorr()
91     base_hi = 0x0;  in nvidia_init_iorr()
92     base_lo = (base & ~0xfff) | 0x18;  in nvidia_init_iorr()
93     mask_hi = 0xf;  in nvidia_init_iorr()
94     mask_lo = ((~(size - 1)) & 0xfffff000) | 0x800;  in nvidia_init_iorr()
99     sys_lo |= 0x00100000;  in nvidia_init_iorr()
102 	return 0;  in nvidia_init_iorr()
127 	if (0 != (rc = nvidia_init_iorr(apbase, current_size->size * 1024 * 1024)))  in nvidia_configure()
133 	nvidia_private.pg_offset = 0;  in nvidia_configure()
134 	if (num_dirs == 0) {  in nvidia_configure()
142 	for (i = 0; i < 8; i++) {  in nvidia_configure()
149 	pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp | 0x11);  in nvidia_configure()
153 	pci_write_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, temp | 0x100);  in nvidia_configure()
163 	return 0;  in nvidia_configure()
173 	pci_write_config_dword(agp_bridge->dev, NVIDIA_0_APSIZE, temp & ~(0x100));  in nvidia_cleanup()
177 	pci_write_config_dword(nvidia_private.dev_2, NVIDIA_2_GARTCTRL, temp & ~(0x11));  in nvidia_cleanup()
207 	if (mask_type != 0 || type != mem->type)  in nvidia_insert_memory()
210 	if (mem->page_count == 0)  in nvidia_insert_memory()
211 		return 0;  in nvidia_insert_memory()
226 	for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {  in nvidia_insert_memory()
236 	return 0;  in nvidia_insert_memory()
247 	if (mask_type != 0 || type != mem->type)  in nvidia_remove_memory()
250 	if (mem->page_count == 0)  in nvidia_remove_memory()
251 		return 0;  in nvidia_remove_memory()
257 	return 0;  in nvidia_remove_memory()
286 	for (i = 0; i < 32 + 1; i++)  in nvidia_tlbflush()
288 	for (i = 0; i < 32 + 1; i++)  in nvidia_tlbflush()
295 	{512, 131072, 7, 0},
306 	{ .mask = 1, .type = 0}
346 					    PCI_DEVFN(0, 1));  in agp_nvidia_probe()
350 					    PCI_DEVFN(0, 2));  in agp_nvidia_probe()
354 					    PCI_DEVFN(30, 0));  in agp_nvidia_probe()
369 		nvidia_private.wbc_mask = 0x00010000;  in agp_nvidia_probe()
373 		nvidia_private.wbc_mask = 0x80000000;  in agp_nvidia_probe()
412 	return 0;  in agp_nvidia_resume()
418 	.class_mask	= ~0,
426 	.class_mask	= ~0,