Lines Matching +full:0 +full:x4e0
19 #if 0
60 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x844); in bcma_core_pcie2_set_ltr_vals()
61 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x883c883c); in bcma_core_pcie2_set_ltr_vals()
63 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x848); in bcma_core_pcie2_set_ltr_vals()
64 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x88648864); in bcma_core_pcie2_set_ltr_vals()
66 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x84C); in bcma_core_pcie2_set_ltr_vals()
67 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x90039003); in bcma_core_pcie2_set_ltr_vals()
86 *si_core_wrapperreg(pcie2, 3, 0x60, 0x8080, 0); in bcma_core_pcie2_hw_ltr_war()
120 #if 0 in pciedev_crwlpciegen2()
123 #if 0 in pciedev_crwlpciegen2()
135 pcie2_set32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x1f); in pciedev_crwlpciegen2_180()
141 pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 1 << 0); in pciedev_crwlpciegen2_182()
166 if ((tmp & 0xe) >> 1 == 2) in bcma_core_pcie2_init()
167 bcma_core_pcie2_cfg_write(pcie2, 0x4e0, 0x17); in bcma_core_pcie2_init()